i5000: halt second BSP

If both FSBs on i5000 are equipped with CPU packages, one CPU
from each package is elected as BSP. To prevent races between
both BSPs, hlt the second BSP.

Change-Id: I6bfcb17d34e9f028280acff1694309e37307ec21
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/615
Tested-by: build bot (Jenkins)
This commit is contained in:
Sven Schnelle 2012-02-09 21:05:20 +01:00
parent 6d64adeaa6
commit 332a7e91c7
2 changed files with 30 additions and 0 deletions

View File

@ -19,3 +19,4 @@
driver-y += northbridge.c
romstage-y += raminit.c udelay.c
cpu_incs += src/northbridge/intel/i5000/halt_second_bsp.S

View File

@ -0,0 +1,29 @@
/* Save BIST result */
movl %eax, %ebp
/* Read the semaphore register of i5000 (BOFL0).
If it returns zero, it means there was already
another read by another CPU */
movl $0x800080c0, %eax
movw $0xcf8, %dx
outl %eax, %dx
addw $4, %dx
inl %dx, %eax
cmp $0, %eax
jne 1f
/* degrade BSP to AP */
mov $0x1b, %ecx
rdmsr
andl $(~0x100), %eax
wrmsr
cli
loop: hlt
jmp loop
1: /* Restore BIST */
mov %ebp, %eax