Get rid of a few warnings:

1. Add some more prototypes to lib.h
2. Include console.h when not using romcc
3. Eliminate an unused function
4. Set a default for SSE2, since it is just for ramtest performance

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5260 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Myles Watson 2010-03-19 02:33:40 +00:00
parent 78acf93291
commit 342619526c
7 changed files with 29 additions and 9 deletions

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@ -4,6 +4,7 @@
#if CONFIG_USE_PRINTK_IN_CAR == 0 #if CONFIG_USE_PRINTK_IN_CAR == 0
#include "console_print.c" #include "console_print.c"
#else /* CONFIG_USE_PRINTK_IN_CAR == 1 */ #else /* CONFIG_USE_PRINTK_IN_CAR == 1 */
#include <console/console.h>
#include "console_printk.c" #include "console_printk.c"
#endif /* CONFIG_USE_PRINTK_IN_CAR */ #endif /* CONFIG_USE_PRINTK_IN_CAR */

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@ -48,6 +48,7 @@ config SSE
config SSE2 config SSE2
bool bool
default n
help help
Select SSE2 in your socket or model Kconfig if your CPU has SSE2 Select SSE2 in your socket or model Kconfig if your CPU has SSE2
streaming SIMD instructions. Some parts of coreboot can be built streaming SIMD instructions. Some parts of coreboot can be built

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@ -19,8 +19,15 @@
/* This file is for "nuisance prototypes" that have no other home. */ /* This file is for "nuisance prototypes" that have no other home. */
#ifndef __LIB_H__
#define __LIB_H__
#ifndef __ROMCC__ /* romcc doesn't support prototypes. */
#ifndef __PRE_RAM__ /* Conflicts with romcc_io.h */
/* Defined in src/lib/clog2.c */ /* Defined in src/lib/clog2.c */
unsigned long log2(unsigned long x); unsigned long log2(unsigned long x);
#endif
/* Defined in src/lib/lzma.c */ /* Defined in src/lib/lzma.c */
unsigned long ulzma(unsigned char *src, unsigned char *dst); unsigned long ulzma(unsigned char *src, unsigned char *dst);
@ -28,3 +35,18 @@ unsigned long ulzma(unsigned char *src, unsigned char *dst);
/* Defined in src/arch/i386/boot/gdt.c */ /* Defined in src/arch/i386/boot/gdt.c */
void move_gdt(void); void move_gdt(void);
/* Defined in src/lib/ramtest.c */
void ram_check(unsigned long start, unsigned long stop);
/* Defined in src/pc80/serial.c */
void uart_init(void);
/* Defined in romstage.c */
#if defined(CONFIG_CPU_AMD_LX) && CONFIG_CPU_AMD_LX
void cache_as_ram_main(void);
#else
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
#endif
#endif /* __ROMCC__ */
#endif /* __LIB_H__ */

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@ -1,3 +1,4 @@
#include <lib.h> /* Prototypes */
#ifndef RAMINIT_SYSINFO #ifndef RAMINIT_SYSINFO
#define RAMINIT_SYSINFO 0 #define RAMINIT_SYSINFO 0
@ -12,14 +13,6 @@ static inline void print_debug_sdram_8(const char *strval, uint32_t val)
#endif #endif
} }
void sdram_no_memory(void)
{
print_err("No memory!!\r\n");
while(1) {
hlt();
}
}
/* Setup SDRAM */ /* Setup SDRAM */
#if RAMINIT_SYSINFO == 1 #if RAMINIT_SYSINFO == 1
void sdram_initialize(int controllers, const struct mem_controller *ctrl, void *sysinfo) void sdram_initialize(int controllers, const struct mem_controller *ctrl, void *sysinfo)

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@ -1,3 +1,5 @@
#include <lib.h> /* Prototypes */
static void write_phys(unsigned long addr, unsigned long value) static void write_phys(unsigned long addr, unsigned long value)
{ {
// Assembler in lib/ is very ugly. But we properly guarded // Assembler in lib/ is very ugly. But we properly guarded

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@ -17,7 +17,6 @@
#include "option_table.h" #include "option_table.h"
#include "pc80/mc146818rtc_early.c" #include "pc80/mc146818rtc_early.c"
#define post_code(x) outb(x, 0x80)
#include "pc80/serial.c" #include "pc80/serial.c"
#include "arch/i386/lib/console.c" #include "arch/i386/lib/console.c"
#include "lib/ramtest.c" #include "lib/ramtest.c"

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@ -1,3 +1,5 @@
#include <lib.h> /* Prototypes */
/* Base Address */ /* Base Address */
#ifndef CONFIG_TTYS0_BASE #ifndef CONFIG_TTYS0_BASE
#define CONFIG_TTYS0_BASE 0x3f8 #define CONFIG_TTYS0_BASE 0x3f8