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mb/siemens/mc_ehl3/devicetree.cb: Remove TSN GbE 0 

Remove the PSE TSN GbE device #0 as it's unused on the board and not
visible during the PCI enumeration.

Change-Id: I4a7d0e437c4f4a12d3a07564cddeafb7c697c6d3
Signed-off-by: Jan Samek <jan.samek@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70700
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jan Samek 2022-12-13 13:16:22 +01:00 committed by Felix Held
parent 12b2a3a477
commit 343644006f
1 changed files with 0 additions and 16 deletions
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16
src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb
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@ -186,22 +186,6 @@ chip soc/intel/elkhartlake
device pci 1c.4 on end # RP5 device pci 1c.4 on end # RP5
device pci 1d.0 off end # Intel PSE IPC (local host to PSE) device pci 1d.0 off end # Intel PSE IPC (local host to PSE)
device pci 1d.1 on # Intel PSE Time-Sensitive Networking GbE 0
# Enable external Marvell PHY 88E1512
chip drivers/net/phy/m88e1512
register "configure_leds" = "true"
# LED[0]: On - 1000 Mbps Link, Off - Else
register "led_0_ctrl" = "7"
# LED[1]: On - Link, Blink - Activity, Off - No Link
register "led_1_ctrl" = "1"
# INTn is routed to LED[2] pin
register "enable_int" = "true"
register "downshift_cnt" = "2"
device mdio 0 on # PHY address
ops m88e1512_ops
end
end
end
device pci 1d.2 on # Intel PSE Time-Sensitive Networking GbE 1 device pci 1d.2 on # Intel PSE Time-Sensitive Networking GbE 1
# Enable external Marvell PHY 88E1512 # Enable external Marvell PHY 88E1512
chip drivers/net/phy/m88e1512 chip drivers/net/phy/m88e1512