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Set up an arbitrary amount of system memory on Geode LX, so 

coreboot_ram can be unpacked to 1MB. The value is quickly
replaced with the real value later, thus causing no harm.

Move RAMBASE to the default of 1MB for the affected boards

Signed-off-by: Aurelien Guillaume <aurelien@iwi.me>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Aurelien Guillaume 2010-09-07 07:43:10 +00:00 committed by Patrick Georgi
parent 31b2e8f566
commit 34697d67c1
12 changed files with 13 additions and 44 deletions
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13
src/cpu/amd/model_lx/msrinit.c
View File

@ -39,6 +39,19 @@ static const msrinit_t msr_table[] =
{MSR_GLIU1_BASE1, {.hi = 0x20000000,.lo = 0x000fff80}}, // 0x00000-0x7FFFF
{MSR_GLIU1_BASE2, {.hi = 0x20000000,.lo = 0x080fffe0}}, // 0x80000-0x9FFFF
{MSR_GLIU1_SHADOW, {.hi = 0x2000FFFF,.lo = 0xFFFF0003}}, // 0xC0000-0xFFFFF
/* Pre-setup access to memory above 1Mb. Here we set up about 500Mb of memory.
* It doesn't really matter in fact how much, however, because the only usage
* of this extended memory will be to host the coreboot_ram stage at RAMBASE,
* currently 1Mb.
* These registers will be set to their correct value by the Northbridge init code.
*
* WARNING: if coreboot_ram could not be loaded, these registers are probably
* incorrectly set here. You may comment the following two lines and set RAMBASE
* to 0x4000 to revert to the previous behavior for LX-boards.
*/
{MSR_GLIU0_SYSMEM, {.hi = 0x2000001F,.lo = 0x6BF00100}}, // 0x100000-0x1F6BF000
{MSR_GLIU1_SYSMEM, {.hi = 0x2000001F,.lo = 0x6BF00100}}, // 0x100000-0x1F6BF000
};
static void msr_init(void)

4
src/mainboard/amd/db800/Kconfig
View File

@ -25,8 +25,4 @@ config IRQ_SLOT_COUNT
int
default 4
config RAMBASE
hex
default 0x4000
endif # BOARD_AMD_DB800

4
src/mainboard/amd/norwich/Kconfig
View File

@ -24,8 +24,4 @@ config IRQ_SLOT_COUNT
int
default 6
config RAMBASE
hex
default 0x4000
endif # BOARD_AMD_NORWICH

4
src/mainboard/artecgroup/dbe61/Kconfig
View File

@ -24,8 +24,4 @@ config IRQ_SLOT_COUNT
int
default 3
#config RAMBASE
# hex
# default 0x4000
endif # BOARD_ARTECGROUP_DBE61

4
src/mainboard/digitallogic/msm800sev/Kconfig
View File

@ -25,8 +25,4 @@ config IRQ_SLOT_COUNT
int
default 9
config RAMBASE
hex
default 0x4000
endif # BOARD_DIGITALLOGIC_MSM800SEV

4
src/mainboard/iei/pcisa-lx-800-r10/Kconfig
View File

@ -24,8 +24,4 @@ config IRQ_SLOT_COUNT
int
default 9
config RAMBASE
hex
default 0x4000
endif # BOARD_IEI_PCISA_LX_800_R10

4
src/mainboard/lippert/roadrunner-lx/Kconfig
View File

@ -27,10 +27,6 @@ config IRQ_SLOT_COUNT
int
default 7
config RAMBASE
hex
default 0x4000
config ONBOARD_UARTS_RS485
bool "Switch on-board serial ports to RS485"
default n

4
src/mainboard/lippert/spacerunner-lx/Kconfig
View File

@ -28,10 +28,6 @@ config IRQ_SLOT_COUNT
int
default 7
config RAMBASE
hex
default 0x4000
config ONBOARD_UARTS_RS485
bool "Switch on-board serial ports to RS485"
default n

4
src/mainboard/pcengines/alix1c/Kconfig
View File

@ -25,8 +25,4 @@ config IRQ_SLOT_COUNT
int
default 5
config RAMBASE
hex
default 0x4000
endif # BOARD_PCENGINES_ALIX1C

4
src/mainboard/pcengines/alix2d/Kconfig
View File

@ -24,8 +24,4 @@ config IRQ_SLOT_COUNT
int
default 7
config RAMBASE
hex
default 0x4000
endif # BOARD_PCENGINES_ALIX2D

4
src/mainboard/traverse/geos/Kconfig
View File

@ -24,8 +24,4 @@ config IRQ_SLOT_COUNT
int
default 6
config RAMBASE
hex
default 0x4000
endif # BOARD_TRAVERSE_GEOS

4
src/mainboard/winent/pl6064/Kconfig
View File

@ -25,8 +25,4 @@ config IRQ_SLOT_COUNT
int
default 7
config RAMBASE
hex
default 0x4000
endif # BOARD_WINENT_PL6064