AGESA: Remove duplicate OemCustomizeInitEarly declarations

Change-Id: I59b2c3f235a6b30e68e78c2fe4065fbc0488bc4c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7158
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)

src/mainboard/amd/inagua/PlatformGnbPcie.c

@@ -20,6 +20,7 @@
 #include "PlatformGnbPcieComplex.h"
 
 #include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
 #include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
 
 #define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE

src/mainboard/amd/inagua/PlatformGnbPcieComplex.h

@@ -64,6 +64,4 @@
 //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
 #define GNB_GPP_PORT8_HOTPLUG_SUPPORT   0  //0:Disable 1:Basic 3:Enhanced
 
-VOID OemCustomizeInitEarly(IN  OUT AMD_EARLY_PARAMS    *InitEarly);
-
 #endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/amd/olivehill/PlatformGnbPcie.c

@@ -21,9 +21,10 @@
 #include "amdlib.h"
 #include "Ids.h"
 #include "heapManager.h"
-#include "PlatformGnbPcieComplex.h"
 #include "Filecode.h"
 
+#include <northbridge/amd/agesa/agesawrapper.h>
+
 #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
 
 static const PCIe_PORT_DESCRIPTOR PortList [] = {

src/mainboard/amd/olivehill/PlatformGnbPcieComplex.h

@@ -1,32 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
-VOID
-OemCustomizeInitEarly (
-  IN  OUT AMD_EARLY_PARAMS    *InitEarly
-  );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/amd/parmer/PlatformGnbPcie.c

@@ -21,9 +21,10 @@
 #include "amdlib.h"
 #include "Ids.h"
 #include "heapManager.h"
-#include "PlatformGnbPcieComplex.h"
 #include "Filecode.h"
 
+#include <northbridge/amd/agesa/agesawrapper.h>
+
 #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
 
 /*

src/mainboard/amd/parmer/PlatformGnbPcieComplex.h

@@ -1,32 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
-VOID
-OemCustomizeInitEarly (
-  IN  OUT AMD_EARLY_PARAMS    *InitEarly
-  );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/amd/persimmon/PlatformGnbPcie.c

@@ -20,6 +20,7 @@
 #include "PlatformGnbPcieComplex.h"
 
 #include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
 #include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
 
 #define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE

src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h

@@ -65,9 +65,5 @@
 											 //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
 #define GNB_GPP_PORT8_HOTPLUG_SUPPORT	0	//0:Disable 1:Basic 3:Enhanced
 
-VOID
-OemCustomizeInitEarly (
-	IN	OUT AMD_EARLY_PARAMS	*InitEarly
-	);
 
 #endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/amd/south_station/PlatformGnbPcie.c

@@ -20,6 +20,7 @@
 #include "PlatformGnbPcieComplex.h"
 
 #include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
 #include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
 
 #define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE

src/mainboard/amd/south_station/PlatformGnbPcieComplex.h

@@ -64,9 +64,5 @@
                                            //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
 #define GNB_GPP_PORT8_HOTPLUG_SUPPORT   0  //0:Disable 1:Basic 3:Enhanced
 
-VOID
-OemCustomizeInitEarly (
-  IN  OUT AMD_EARLY_PARAMS    *InitEarly
-  );
 
 #endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/amd/thatcher/PlatformGnbPcie.c

@@ -21,9 +21,10 @@
 #include "amdlib.h"
 #include "Ids.h"
 #include "heapManager.h"
-#include "PlatformGnbPcieComplex.h"
 #include "Filecode.h"
 
+#include <northbridge/amd/agesa/agesawrapper.h>
+
 #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
 
 /*

src/mainboard/amd/thatcher/PlatformGnbPcieComplex.h

@@ -1,32 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
-VOID
-OemCustomizeInitEarly (
-  IN  OUT AMD_EARLY_PARAMS    *InitEarly
-  );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/amd/torpedo/PlatformGnbPcie.c

@@ -20,6 +20,7 @@
 #include "PlatformGnbPcieComplex.h"
 
 #include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
 #include <vendorcode/amd/agesa/f12/Proc/CPU/heapManager.h>
 
 #define FILECODE PROC_GNB_PCIE_FAMILY_0X12_F12PCIECOMPLEXCONFIG_FILECODE

src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h

@@ -64,9 +64,5 @@
                                            //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
 #define GNB_GPP_PORT8_HOTPLUG_SUPPORT   0  //0:Disable 1:Basic 3:Enhanced
 
-VOID
-OemCustomizeInitEarly (
-  IN  OUT AMD_EARLY_PARAMS    *InitEarly
-  );
 
 #endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/amd/union_station/PlatformGnbPcie.c

@@ -25,6 +25,7 @@
 #include "Filecode.h"
 
 #include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
 
 #define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
 

src/mainboard/amd/union_station/PlatformGnbPcieComplex.h

@@ -64,9 +64,5 @@
                                            //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
 #define GNB_GPP_PORT8_HOTPLUG_SUPPORT   0  //0:Disable 1:Basic 3:Enhanced
 
-VOID
-OemCustomizeInitEarly (
-  IN  OUT AMD_EARLY_PARAMS    *InitEarly
-  );
 
 #endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/asrock/e350m1/PlatformGnbPcie.c

@@ -25,6 +25,7 @@
 #include "Filecode.h"
 
 #include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
 
 #define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
 

src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h

@@ -64,9 +64,5 @@
                                            //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
 #define GNB_GPP_PORT8_HOTPLUG_SUPPORT   0  //0:Disable 1:Basic 3:Enhanced
 
-VOID
-OemCustomizeInitEarly (
-  IN  OUT AMD_EARLY_PARAMS    *InitEarly
-  );
 
 #endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/asrock/imb-a180/PlatformGnbPcie.c

@@ -21,9 +21,10 @@
 #include "amdlib.h"
 #include "Ids.h"
 #include "heapManager.h"
-#include "PlatformGnbPcieComplex.h"
 #include "Filecode.h"
 
+#include <northbridge/amd/agesa/agesawrapper.h>
+
 #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
 
 static const PCIe_PORT_DESCRIPTOR PortList [] = {

src/mainboard/asrock/imb-a180/PlatformGnbPcieComplex.h

@@ -1,32 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
-VOID
-OemCustomizeInitEarly (
-  IN  OUT AMD_EARLY_PARAMS    *InitEarly
-  );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/asus/f2a85-m/PlatformGnbPcie.c

@@ -17,8 +17,11 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include "PlatformGnbPcieComplex.h"
+#include "Porting.h"
+#include "AGESA.h"
+#include "amdlib.h"
 
+#include <northbridge/amd/agesa/agesawrapper.h>
 #include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
 
 #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE

src/mainboard/asus/f2a85-m/PlatformGnbPcieComplex.h

@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include <vendorcode/amd/agesa/f15tn/AGESA.h>
-#include <vendorcode/amd/agesa/f15tn/Lib/amdlib.h>
-
-VOID
-OemCustomizeInitEarly (
-  IN  OUT AMD_EARLY_PARAMS    *InitEarly
-  );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c

@@ -26,6 +26,7 @@
 #include "Filecode.h"
 
 #include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
 
 /*---------------------------------------------------------------------------------------*/
 /**

src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h

@@ -66,9 +66,5 @@
 											 //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
 #define GNB_GPP_PORT8_HOTPLUG_SUPPORT	0	//0:Disable 1:Basic 3:Enhanced
 
-VOID
-OemCustomizeInitEarly (
-	IN	OUT AMD_EARLY_PARAMS	*InitEarly
-	);
 
 #endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcie.c

@@ -17,8 +17,11 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include "PlatformGnbPcieComplex.h"
+#include "Porting.h"
+#include "AGESA.h"
+#include "amdlib.h"
 
+#include <northbridge/amd/agesa/agesawrapper.h>
 #include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
 
 #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE

src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcieComplex.h

@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include <vendorcode/amd/agesa/f15tn/AGESA.h>
-#include <vendorcode/amd/agesa/f15tn/Lib/amdlib.h>
-
-VOID
-OemCustomizeInitEarly (
-  IN  OUT AMD_EARLY_PARAMS    *InitEarly
-  );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c

@@ -21,6 +21,7 @@
 #include "PlatformGnbPcieComplex.h"
 
 #include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
 #include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
 
 #define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE

src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h

@@ -79,6 +79,4 @@
 #define GNB_GPP_PORT8_CHANNEL_TYPE		4
 #define GNB_GPP_PORT8_HOTPLUG_SUPPORT	0
 
-void OemCustomizeInitEarly (IN OUT AMD_EARLY_PARAMS *InitEarly);
-
 #endif /* _PLATFORM_GNB_PCIE_COMPLEX_H */

src/mainboard/lenovo/g505s/PlatformGnbPcie.c

@@ -17,8 +17,11 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include "PlatformGnbPcieComplex.h"
+#include "Porting.h"
+#include "AGESA.h"
+#include "amdlib.h"
 
+#include <northbridge/amd/agesa/agesawrapper.h>
 #include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
 
 #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE

src/mainboard/lenovo/g505s/PlatformGnbPcieComplex.h

@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include <vendorcode/amd/agesa/f15tn/AGESA.h>
-#include <vendorcode/amd/agesa/f15tn/Lib/amdlib.h>
-
-VOID
-OemCustomizeInitEarly (
-  IN  OUT AMD_EARLY_PARAMS    *InitEarly
-  );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c

@@ -25,6 +25,7 @@
 #include "Filecode.h"
 
 #include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
 
 #define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
 

src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h

@@ -65,9 +65,5 @@
 											 //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
 #define GNB_GPP_PORT8_HOTPLUG_SUPPORT	0	//0:Disable 1:Basic 3:Enhanced
 
-VOID
-OemCustomizeInitEarly (
-	IN	OUT AMD_EARLY_PARAMS	*InitEarly
-	);
 
 #endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/mainboard/lippert/toucan-af/PlatformGnbPcie.c

@@ -25,6 +25,7 @@
 #include "Filecode.h"
 
 #include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
 
 #define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
 

src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h

@@ -65,9 +65,5 @@
 											 //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
 #define GNB_GPP_PORT8_HOTPLUG_SUPPORT	0	//0:Disable 1:Basic 3:Enhanced
 
-VOID
-OemCustomizeInitEarly (
-	IN	OUT AMD_EARLY_PARAMS	*InitEarly
-	);
 
 #endif //_PLATFORM_GNB_PCIE_COMPLEX_H

src/northbridge/amd/agesa/agesawrapper.h

@@ -65,4 +65,7 @@ void *agesawrapper_getlateinitptr (int pick);
 AGESA_STATUS agesawrapper_fchs3earlyrestore(void);
 AGESA_STATUS agesawrapper_fchs3laterestore(void);
 
+void OemCustomizeInitEarly(AMD_EARLY_PARAMS *InitEarly);
+void OemCustomizeInitPost(AMD_POST_PARAMS *InitPost);
+
 #endif /* _AGESAWRAPPER_H_ */

src/northbridge/amd/agesa/family12/agesawrapper.c

@@ -47,8 +47,6 @@ VOID *AcpiWheaMce = NULL;
 VOID *AcpiWheaCmc = NULL;
 VOID *AcpiAlib = NULL;
 
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly);
-
 UINT32 ReadAmdSbPmr(IN UINT8 IndexValue, OUT UINT8 * DataValue);
 UINT32 WriteAmdSbPmr(IN UINT8 IndexValue, IN UINT8 DataValue);
 

src/northbridge/amd/agesa/family14/agesawrapper.c

@@ -46,8 +46,6 @@ VOID *AcpiWheaMce = NULL;
 VOID *AcpiWheaCmc = NULL;
 VOID *AcpiAlib = NULL;
 
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly);
-
 AGESA_STATUS agesawrapper_amdinitcpuio(VOID)
 {
 	UINT64 MsrReg;

src/northbridge/amd/agesa/family15/agesawrapper.c

@@ -47,11 +47,11 @@ VOID *AcpiWheaCmc = NULL;
 VOID *AcpiAlib = NULL;
 
 /* TODO: Function body should be in mainboard directory. */
-static VOID OemCustomizeInitEarly(AMD_EARLY_PARAMS * InitEarly)
+void OemCustomizeInitEarly(AMD_EARLY_PARAMS *InitEarly)
 {
 }
 
-static VOID OemCustomizeInitPost(AMD_POST_PARAMS *InitPost)
+void OemCustomizeInitPost(AMD_POST_PARAMS *InitPost)
 {
 #if IS_ENABLED(CONFIG_BOARD_AMD_DINAR)
 	InitPost->MemConfig.UmaMode = UMA_AUTO;

src/northbridge/amd/agesa/family15rl/agesawrapper.c

@@ -52,8 +52,6 @@ VOID *AcpiWheaCmc = NULL;
 VOID *AcpiAlib = NULL;
 VOID *AcpiIvrs = NULL;
 
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly);
-
 AGESA_STATUS agesawrapper_amdinitcpuio(void)
 {
 	UINT64 MsrReg;

src/northbridge/amd/agesa/family15tn/agesawrapper.c

@@ -52,8 +52,6 @@ VOID *AcpiWheaCmc = NULL;
 VOID *AcpiAlib = NULL;
 VOID *AcpiIvrs = NULL;
 
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly);
-
 AGESA_STATUS agesawrapper_amdinitcpuio(void)
 {
 	UINT64 MsrReg;

src/northbridge/amd/agesa/family16kb/agesawrapper.c

@@ -52,8 +52,6 @@ VOID *AcpiWheaCmc = NULL;
 VOID *AcpiAlib = NULL;
 VOID *AcpiIvrs = NULL;
 
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly);
-
 AGESA_STATUS agesawrapper_amdinitcpuio(void)
 {
 	UINT64 MsrReg;