Move Intel power management related defines to some central location.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6085 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -25,6 +25,7 @@
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#include <arch/acpigen.h>
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#include <arch/cpu.h>
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#include <cpu/x86/msr.h>
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#include <cpu/intel/acpi.h>
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#include <device/device.h>
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// XXX: PSS table values for power consumption are for Merom only
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@ -83,8 +84,6 @@ void generate_cpu_entries(void)
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int max_states=8;
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int busratio_step=2;
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#define IA32_PLATFORM_ID 0x017
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#define IA32_PERF_STS 0x198
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msr = rdmsr(IA32_PERF_STS);
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int busratio_min=(msr.lo >> 24) & 0x1f;
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int busratio_max=(msr.hi >> (40-32)) & 0x1f;
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@ -0,0 +1,5 @@
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#define IA32_PLATFORM_ID 0x017
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#define IA32_PERF_STS 0x198
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#define IA32_PERF_CTL 0x199
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#define MSR_THERM2_CTL 0x19D
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#define IA32_MISC_ENABLES 0x1A0
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@ -33,6 +33,7 @@
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#include <console/console.h>
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#include <cpu/x86/bist.h>
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#include <cpu/intel/acpi.h>
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#include "southbridge/intel/i3100/i3100_early_smbus.c"
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#include "southbridge/intel/i3100/i3100_early_lpc.c"
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@ -44,11 +45,6 @@
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#define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0)
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#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
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#define IA32_PERF_STS 0x198
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#define IA32_PERF_CTL 0x199
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#define MSR_THERM2_CTL 0x19D
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#define IA32_MISC_ENABLES 0x1A0
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/* SATA */
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#define SATA_MAP 0x90
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