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intel/common/acpi: Use UART_BASE_0_ADDR macro for LPSS UART 

This patch fixes the build issue by replacing UART_DEBUG_BASE_ADDRESS
macro with UART_BASE_0_ADDR macro to configure LPSS UART base adress
for ACPI debug prints.

TEST= Build and boot soraka and fetch the ASL debug prints.

Change-Id: Ib31174701c56c88829ae0e725b546b66ea1ed16d
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/21513
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
V Sowmya 2017-09-12 14:52:12 +05:30 committed by Aaron Durbin
parent e1bdc6aa16
commit 3670cc1bad
1 changed files with 2 additions and 1 deletions
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3
src/soc/intel/common/acpi/acpi_debug.asl
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@ -58,7 +58,8 @@ Method (APRT, 1, Serialized)
Store (INDX, LENG) /* Length of the String */ Store (INDX, LENG) /* Length of the String */
#if IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM_32) #if IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM_32)
OperationRegion (UBAR, SystemMemory, UART_DEBUG_BASE_ADDRESS, 24) OperationRegion (UBAR, SystemMemory,
UART_BASE_0_ADDR(CONFIG_UART_FOR_CONSOLE), 24)
Field (UBAR, AnyAcc, NoLock, Preserve) Field (UBAR, AnyAcc, NoLock, Preserve)
{ {
TDR, 8, /* Transmit Data Register BAR + 0x000 */ TDR, 8, /* Transmit Data Register BAR + 0x000 */