arm64: Add ARCH Timer
SoC sdm845 uses ARCH Timer Change-Id: I45e2d4d2c16a2cded3df20d393d2b8820050ac80 Signed-off-by: T Michael Turney <mturney@codeaurora.org> Reviewed-on: https://review.coreboot.org/25612 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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@ -22,6 +22,10 @@ config ARCH_RAMSTAGE_ARM64
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source src/arch/arm64/armv8/Kconfig
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source src/arch/arm64/armv8/Kconfig
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config ARM64_USE_ARCH_TIMER
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bool
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default n
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config ARM64_USE_ARM_TRUSTED_FIRMWARE
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config ARM64_USE_ARM_TRUSTED_FIRMWARE
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bool
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bool
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default n
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default n
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@ -45,6 +45,7 @@ $(call src-to-obj,bootblock,$(dir)/id.S): $(obj)/build.h
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bootblock-y += boot.c
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bootblock-y += boot.c
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bootblock-y += eabi_compat.c
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bootblock-y += eabi_compat.c
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bootblock-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c
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bootblock-y += transition.c transition_asm.S
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bootblock-y += transition.c transition_asm.S
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bootblock-y += memset.S
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bootblock-y += memset.S
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@ -72,6 +73,7 @@ $(objcbfs)/verstage.debug: $$(verstage-objs)
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verstage-y += boot.c
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verstage-y += boot.c
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verstage-y += div0.c
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verstage-y += div0.c
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verstage-y += eabi_compat.c
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verstage-y += eabi_compat.c
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verstage-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c
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verstage-y += memset.S
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verstage-y += memset.S
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verstage-y += memcpy.S
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verstage-y += memcpy.S
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verstage-y += memmove.S
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verstage-y += memmove.S
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@ -89,6 +91,7 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y)
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romstage-y += boot.c
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romstage-y += boot.c
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romstage-y += div0.c
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romstage-y += div0.c
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romstage-y += eabi_compat.c
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romstage-y += eabi_compat.c
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romstage-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c
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romstage-y += memset.S
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romstage-y += memset.S
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romstage-y += memcpy.S
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romstage-y += memcpy.S
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romstage-y += memmove.S
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romstage-y += memmove.S
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@ -115,6 +118,7 @@ ramstage-y += div0.c
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ramstage-y += eabi_compat.c
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ramstage-y += eabi_compat.c
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ramstage-y += boot.c
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ramstage-y += boot.c
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ramstage-y += tables.c
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ramstage-y += tables.c
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ramstage-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c
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ramstage-y += memset.S
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ramstage-y += memset.S
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ramstage-y += memcpy.S
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ramstage-y += memcpy.S
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ramstage-y += memmove.S
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ramstage-y += memmove.S
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@ -125,6 +129,7 @@ rmodules_arm64-y += memset.S
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rmodules_arm64-y += memcpy.S
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rmodules_arm64-y += memcpy.S
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rmodules_arm64-y += memmove.S
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rmodules_arm64-y += memmove.S
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rmodules_arm64-y += eabi_compat.c
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rmodules_arm64-y += eabi_compat.c
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rmodules_arm64-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c
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ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
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ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
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@ -0,0 +1,25 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <timer.h>
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#include <arch/lib_helpers.h>
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void timer_monotonic_get(struct mono_time *mt)
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{
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uint64_t tvalue = raw_read_cntpct_el0();
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uint32_t tfreq = raw_read_cntfrq_el0();
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long usecs = (tvalue * 1000000) / tfreq;
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mono_time_set_usecs(mt, usecs);
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}
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@ -1059,3 +1059,11 @@ void raw_write_cntfrq_el0(uint32_t cntfrq_el0)
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{
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{
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__asm__ __volatile__("msr CNTFRQ_EL0, %0\n\t" : : "r" ((uint64_t)cntfrq_el0) : "memory");
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__asm__ __volatile__("msr CNTFRQ_EL0, %0\n\t" : : "r" ((uint64_t)cntfrq_el0) : "memory");
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}
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}
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uint64_t raw_read_cntpct_el0(void)
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{
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uint64_t cntpct_el0;
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__asm__ __volatile__("mrs %0, CNTPCT_EL0\n\t" : "=r" (cntpct_el0) : : "memory");
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return cntpct_el0;
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}
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@ -557,6 +557,7 @@ uint64_t raw_read_vbar(uint32_t el);
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void raw_write_vbar(uint64_t vbar, uint32_t el);
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void raw_write_vbar(uint64_t vbar, uint32_t el);
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uint32_t raw_read_cntfrq_el0(void);
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uint32_t raw_read_cntfrq_el0(void);
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void raw_write_cntfrq_el0(uint32_t cntfrq_el0);
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void raw_write_cntfrq_el0(uint32_t cntfrq_el0);
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uint64_t raw_read_cntpct_el0(void);
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/* Cache maintenance system instructions */
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/* Cache maintenance system instructions */
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void dccisw(uint64_t cisw);
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void dccisw(uint64_t cisw);
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