skylake: select HAVE_INTEL_FIRMWARE
Use the common ME and descriptor code. BUG=chrome-os-partner:43462 BRANCH=None TEST=Built glados Change-Id: I7196f587b92fd26129b30e2cd73f4caf5f4ebef8 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11735 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -22,6 +22,7 @@ config CPU_SPECIFIC_OPTIONS
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select GENERIC_GPIO_LIB
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select HAS_PRECBMEM_TIMESTAMP_REGION
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select HAVE_HARD_RESET
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select HAVE_INTEL_FIRMWARE
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select HAVE_MONOTONIC_TIMER
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select HAVE_SMI_HANDLER
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select IOAPIC
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@ -85,38 +86,6 @@ config DCACHE_RAM_SIZE
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The size of the cache-as-ram region required during bootblock
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and/or romstage.
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config HAVE_IFD_BIN
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bool "Use Intel Firmware Descriptor from existing binary"
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default n
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config BUILD_WITH_FAKE_IFD
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bool "Build with a fake IFD"
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default y if !HAVE_IFD_BIN
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help
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If you don't have an Intel Firmware Descriptor (ifd.bin) for your
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board, you can select this option and coreboot will build without it.
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Though, the resulting coreboot.rom will not contain all parts required
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to get coreboot running on your board. You can however write only the
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BIOS section to your board's flash ROM and keep the other sections
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untouched. Unfortunately the current version of flashrom doesn't
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support this yet. But there is a patch pending [1].
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WARNING: Never write a complete coreboot.rom to your flash ROM if it
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was built with a fake IFD. It just won't work.
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[1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html
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config HAVE_ME_BIN
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bool "Add Intel Management Engine firmware"
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default y
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help
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The Intel processor in the selected system requires a special firmware
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for an integrated controller called Management Engine (ME). The ME
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firmware might be provided in coreboot's 3rdparty/blobs repository. If
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not and if you don't have the firmware elsewhere, you can still
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build coreboot without it. In this case however, you'll have to make
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sure that you don't overwrite your ME firmware on your flash ROM.
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config HEAP_SIZE
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hex
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default 0x80000
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@ -125,31 +94,6 @@ config IED_REGION_SIZE
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hex
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default 0x400000
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config IFD_BIN_PATH
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string "Path to intel firmware descriptor"
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depends on !BUILD_WITH_FAKE_IFD
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default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin"
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config IFD_BIOS_SECTION
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depends on BUILD_WITH_FAKE_IFD
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string
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default ""
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config IFD_ME_SECTION
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depends on BUILD_WITH_FAKE_IFD
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string
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default ""
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config IFD_PLATFORM_SECTION
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depends on BUILD_WITH_FAKE_IFD
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string
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default ""
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config ME_BIN_PATH
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string "Path to management engine firmware"
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depends on HAVE_ME_BIN
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default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/me.bin"
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config MMCONF_BASE_ADDRESS
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hex "MMIO Base Address"
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default 0xe0000000
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@ -67,40 +67,4 @@ CPPFLAGS_common += -I$(src)/soc/intel/skylake/include
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# Currently used for microcode path.
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CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR)
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# Run an intermediate step when producing coreboot.rom
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# that adds additional components to the final firmware
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# image outside of CBFS
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INTERMEDIATE := pch_add_me
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ifeq ($(CONFIG_BUILD_WITH_FAKE_IFD),y)
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IFD_BIN_PATH := $(objgenerated)/ifdfake.bin
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IFD_SECTIONS := $(addprefix -b ,$(CONFIG_IFD_BIOS_SECTION:"%"=%)) \
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$(addprefix -m ,$(CONFIG_IFD_ME_SECTION:"%"=%)) \
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$(addprefix -p ,$(CONFIG_IFD_PLATFORM_SECTION:"%"=%))
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else
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IFD_BIN_PATH := $(CONFIG_IFD_BIN_PATH)
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endif
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pch_add_me: $(obj)/coreboot.pre $(IFDTOOL) $(IFDFAKE)
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ifeq ($(CONFIG_BUILD_WITH_FAKE_IFD),y)
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printf "\n** WARNING **\n"
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printf "Coreboot will be built with a fake Intel Firmware Descriptor (IFD).\n"
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printf "Never write a complete coreboot.rom with a fake IFD to your board's\n"
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printf "flash ROM! Make sure that you only write valid flash regions.\n\n"
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printf " IFDFAKE Building a fake Intel Firmware Descriptor\n"
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$(IFDFAKE) $(IFD_SECTIONS) $(IFD_BIN_PATH)
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endif
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printf " DD Adding Intel Firmware Descriptor\n"
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dd if=$(IFD_BIN_PATH) \
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of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
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ifeq ($(CONFIG_HAVE_ME_BIN),y)
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printf " IFDTOOL me.bin -> coreboot.pre\n"
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$(objutil)/ifdtool/ifdtool \
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-i ME:$(CONFIG_ME_BIN_PATH) \
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$(obj)/coreboot.pre
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mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
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endif
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PHONY += pch_add_me
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endif
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