mb/google/guybrush/var/dewatt: Update APU STT setting
update STT setting for dewatt. BUG=b:228040295 BRANCH=guybrush TEST=build, verify the parameter has been applied to the system by checking the AGT tool. Signed-off-by: Chris.Wang <chris.wang@amd.corp-partner.google.com> Change-Id: Id319d42747dd0d5f6a9ca727635d85e6b9bd65af Reviewed-on: https://review.coreboot.org/c/coreboot/+/63699 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -27,6 +27,28 @@ chip soc/amd/cezanne
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register "telemetry_vddcrsocfull_scale_current_mA" = "29785" #mA
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register "telemetry_vddcrsocoffset" = "461"
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# Enable STT support
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register "stt_control" = "1"
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register "stt_pcb_sensor_count" = "2"
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register "stt_min_limit" = "15000"
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register "stt_m1" = "0x022B"
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register "stt_m2" = "0x117"
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register "stt_m3" = "0"
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register "stt_m4" = "0"
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register "stt_m5" = "0"
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register "stt_m6" = "0"
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register "stt_c_apu" = "0xBA4"
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register "stt_c_gpu" = "0"
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register "stt_c_hs2" = "0"
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register "stt_alpha_apu" = "0x199A"
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register "stt_alpha_gpu" = "0"
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register "stt_alpha_hs2" = "0"
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register "stt_skin_temp_apu" = "0x2D00"
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register "stt_skin_temp_gpu" = "0"
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register "stt_skin_temp_hs2" = "0"
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register "stt_error_coeff" = "0x21"
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register "stt_error_rate_coefficient" = "0x2666"
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#USB 2/3 phy config
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register "usb_phy" = "{
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/* Left USB C0 Port */
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