mb/google/guybrush/var/dewatt: Update APU STT setting

update STT setting for dewatt.

BUG=b:228040295
BRANCH=guybrush
TEST=build, verify the parameter has been applied to
     the system by checking the AGT tool.

Signed-off-by: Chris.Wang <chris.wang@amd.corp-partner.google.com>
Change-Id: Id319d42747dd0d5f6a9ca727635d85e6b9bd65af
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63699
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Chris.Wang 2022-04-18 22:51:42 +08:00 committed by Felix Held
parent d643165c64
commit 38f7ba3db4
1 changed files with 22 additions and 0 deletions

View File

@ -27,6 +27,28 @@ chip soc/amd/cezanne
register "telemetry_vddcrsocfull_scale_current_mA" = "29785" #mA register "telemetry_vddcrsocfull_scale_current_mA" = "29785" #mA
register "telemetry_vddcrsocoffset" = "461" register "telemetry_vddcrsocoffset" = "461"
# Enable STT support
register "stt_control" = "1"
register "stt_pcb_sensor_count" = "2"
register "stt_min_limit" = "15000"
register "stt_m1" = "0x022B"
register "stt_m2" = "0x117"
register "stt_m3" = "0"
register "stt_m4" = "0"
register "stt_m5" = "0"
register "stt_m6" = "0"
register "stt_c_apu" = "0xBA4"
register "stt_c_gpu" = "0"
register "stt_c_hs2" = "0"
register "stt_alpha_apu" = "0x199A"
register "stt_alpha_gpu" = "0"
register "stt_alpha_hs2" = "0"
register "stt_skin_temp_apu" = "0x2D00"
register "stt_skin_temp_gpu" = "0"
register "stt_skin_temp_hs2" = "0"
register "stt_error_coeff" = "0x21"
register "stt_error_rate_coefficient" = "0x2666"
#USB 2/3 phy config #USB 2/3 phy config
register "usb_phy" = "{ register "usb_phy" = "{
/* Left USB C0 Port */ /* Left USB C0 Port */