drivers/intel/fsp2_0: Split reset handling logic
FSP 2.0 spec only defines 2 reset request (COLD, WARM) exit codes. The rest 6 codes are platform-specific and may vary. Modify helper function so that only basic resets are handled and let SoC deal with the rest. Change-Id: Ib2f446e0449301407b135933a2088bcffc3ac32a Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/15730 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
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@ -22,9 +22,12 @@ enum fsp_status {
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FSP_SUCCESS = 0x00000000,
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FSP_SUCCESS = 0x00000000,
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FSP_STATUS_RESET_REQUIRED_COLD = 0x40000001,
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FSP_STATUS_RESET_REQUIRED_COLD = 0x40000001,
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FSP_STATUS_RESET_REQUIRED_WARM = 0x40000002,
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FSP_STATUS_RESET_REQUIRED_WARM = 0x40000002,
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FSP_STATUS_RESET_REQUIRED_SHUTDOWN = 0x40000003,
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FSP_STATUS_RESET_REQUIRED_3 = 0x40000003,
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FSP_STATUS_RESET_REQUIRED_UNDEFINED = 0x40000004,
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FSP_STATUS_RESET_REQUIRED_4 = 0x40000004,
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FSP_STATUS_RESET_REQUIRED_GLOBAL_RESET = 0x40000005,
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FSP_STATUS_RESET_REQUIRED_5 = 0x40000005,
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FSP_STATUS_RESET_REQUIRED_6 = 0x40000006,
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FSP_STATUS_RESET_REQUIRED_7 = 0x40000007,
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FSP_STATUS_RESET_REQUIRED_8 = 0x40000008,
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FSP_INVALID_PARAMETER = 0x80000002,
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FSP_INVALID_PARAMETER = 0x80000002,
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FSP_UNSUPPORTED = 0x80000003,
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FSP_UNSUPPORTED = 0x80000003,
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FSP_NOT_READY = 0x80000006,
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FSP_NOT_READY = 0x80000006,
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@ -42,9 +42,15 @@ enum cb_err fsp_validate_component(struct fsp_header *hdr,
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/* Load a vbt.bin file for graphics. Returns 0 if a valid VBT is not found. */
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/* Load a vbt.bin file for graphics. Returns 0 if a valid VBT is not found. */
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uintptr_t fsp_load_vbt(void);
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uintptr_t fsp_load_vbt(void);
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/* Trivial handling of reset exit statuses */
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/*
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* Handle FSP reboot request status. Chipset/soc is expected to provide
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* chipset_handle_reset() that deals with reset type codes specific to given
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* SoC. If the requested status is not a reboot status or unhandled, this
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* function does nothing.
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*/
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void fsp_handle_reset(enum fsp_status status);
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void fsp_handle_reset(enum fsp_status status);
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/* Returns true if the non-success status is a reset request */
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bool fsp_reset_requested(enum fsp_status status);
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/* SoC/chipset must provide this to handle platform-specific reset codes */
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void chipset_handle_reset(enum fsp_status status);
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#endif /* _FSP2_0_UTIL_H_ */
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#endif /* _FSP2_0_UTIL_H_ */
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@ -134,8 +134,19 @@ enum cb_err fsp_validate_component(struct fsp_header *hdr,
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return CB_SUCCESS;
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return CB_SUCCESS;
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}
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}
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static bool fsp_reset_requested(enum fsp_status status)
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{
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return (status >= FSP_STATUS_RESET_REQUIRED_COLD &&
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status <= FSP_STATUS_RESET_REQUIRED_8);
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}
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void fsp_handle_reset(enum fsp_status status)
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void fsp_handle_reset(enum fsp_status status)
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{
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{
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if (!fsp_reset_requested(status))
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return;
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printk(BIOS_DEBUG, "FSP: handling reset type %x\n", status);
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switch(status) {
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switch(status) {
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case FSP_STATUS_RESET_REQUIRED_COLD:
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case FSP_STATUS_RESET_REQUIRED_COLD:
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hard_reset();
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hard_reset();
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@ -143,16 +154,15 @@ void fsp_handle_reset(enum fsp_status status)
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case FSP_STATUS_RESET_REQUIRED_WARM:
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case FSP_STATUS_RESET_REQUIRED_WARM:
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soft_reset();
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soft_reset();
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break;
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break;
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case FSP_STATUS_RESET_REQUIRED_GLOBAL_RESET:
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case FSP_STATUS_RESET_REQUIRED_3:
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global_reset();
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case FSP_STATUS_RESET_REQUIRED_4:
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case FSP_STATUS_RESET_REQUIRED_5:
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case FSP_STATUS_RESET_REQUIRED_6:
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case FSP_STATUS_RESET_REQUIRED_7:
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case FSP_STATUS_RESET_REQUIRED_8:
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chipset_handle_reset(status);
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break;
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break;
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default:
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default:
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break;
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break;
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}
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}
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}
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}
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bool fsp_reset_requested(enum fsp_status status)
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{
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return (status >= FSP_STATUS_RESET_REQUIRED_COLD &&
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status <= FSP_STATUS_RESET_REQUIRED_GLOBAL_RESET);
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}
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@ -412,7 +412,6 @@ static void fsp_notify_dummy(void *arg)
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if ((ret = fsp_notify(ph)) != FSP_SUCCESS) {
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if ((ret = fsp_notify(ph)) != FSP_SUCCESS) {
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printk(BIOS_CRIT, "FspNotify failed, ret = %x!\n", ret);
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printk(BIOS_CRIT, "FspNotify failed, ret = %x!\n", ret);
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if (fsp_reset_requested(ret))
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fsp_handle_reset(ret);
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fsp_handle_reset(ret);
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}
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}
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/* Call END_OF_FIRMWARE Notify after READY_TO_BOOT Notify */
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/* Call END_OF_FIRMWARE Notify after READY_TO_BOOT Notify */
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@ -15,6 +15,7 @@
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#include <console/console.h>
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#include <console/console.h>
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#include <delay.h>
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#include <delay.h>
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#include <fsp/util.h>
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#include <reset.h>
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#include <reset.h>
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#include <soc/heci.h>
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#include <soc/heci.h>
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#include <soc/pm.h>
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#include <soc/pm.h>
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@ -57,3 +58,16 @@ void reset_prepare(void)
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}
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}
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printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw));
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printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw));
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}
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}
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void chipset_handle_reset(enum fsp_status status)
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{
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switch(status) {
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case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */
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global_reset();
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break;
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default:
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printk(BIOS_ERR, "unhandled reset type %x\n", status);
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die("unknown reset type");
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break;
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}
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}
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