drivers/intel/fsp2_0: Split reset handling logic

FSP 2.0 spec only defines 2 reset request (COLD, WARM) exit codes. The
rest 6 codes are platform-specific and may vary. Modify helper function
so that only basic resets are handled and let SoC deal with the rest.

Change-Id: Ib2f446e0449301407b135933a2088bcffc3ac32a
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/15730
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Andrey Petrov 2016-07-18 00:15:41 -07:00 committed by Aaron Durbin
parent 1b1d4b7ae6
commit 3a94a3ba5b
5 changed files with 48 additions and 16 deletions

View File

@ -22,9 +22,12 @@ enum fsp_status {
FSP_SUCCESS = 0x00000000, FSP_SUCCESS = 0x00000000,
FSP_STATUS_RESET_REQUIRED_COLD = 0x40000001, FSP_STATUS_RESET_REQUIRED_COLD = 0x40000001,
FSP_STATUS_RESET_REQUIRED_WARM = 0x40000002, FSP_STATUS_RESET_REQUIRED_WARM = 0x40000002,
FSP_STATUS_RESET_REQUIRED_SHUTDOWN = 0x40000003, FSP_STATUS_RESET_REQUIRED_3 = 0x40000003,
FSP_STATUS_RESET_REQUIRED_UNDEFINED = 0x40000004, FSP_STATUS_RESET_REQUIRED_4 = 0x40000004,
FSP_STATUS_RESET_REQUIRED_GLOBAL_RESET = 0x40000005, FSP_STATUS_RESET_REQUIRED_5 = 0x40000005,
FSP_STATUS_RESET_REQUIRED_6 = 0x40000006,
FSP_STATUS_RESET_REQUIRED_7 = 0x40000007,
FSP_STATUS_RESET_REQUIRED_8 = 0x40000008,
FSP_INVALID_PARAMETER = 0x80000002, FSP_INVALID_PARAMETER = 0x80000002,
FSP_UNSUPPORTED = 0x80000003, FSP_UNSUPPORTED = 0x80000003,
FSP_NOT_READY = 0x80000006, FSP_NOT_READY = 0x80000006,

View File

@ -42,9 +42,15 @@ enum cb_err fsp_validate_component(struct fsp_header *hdr,
/* Load a vbt.bin file for graphics. Returns 0 if a valid VBT is not found. */ /* Load a vbt.bin file for graphics. Returns 0 if a valid VBT is not found. */
uintptr_t fsp_load_vbt(void); uintptr_t fsp_load_vbt(void);
/* Trivial handling of reset exit statuses */ /*
* Handle FSP reboot request status. Chipset/soc is expected to provide
* chipset_handle_reset() that deals with reset type codes specific to given
* SoC. If the requested status is not a reboot status or unhandled, this
* function does nothing.
*/
void fsp_handle_reset(enum fsp_status status); void fsp_handle_reset(enum fsp_status status);
/* Returns true if the non-success status is a reset request */
bool fsp_reset_requested(enum fsp_status status); /* SoC/chipset must provide this to handle platform-specific reset codes */
void chipset_handle_reset(enum fsp_status status);
#endif /* _FSP2_0_UTIL_H_ */ #endif /* _FSP2_0_UTIL_H_ */

View File

@ -134,8 +134,19 @@ enum cb_err fsp_validate_component(struct fsp_header *hdr,
return CB_SUCCESS; return CB_SUCCESS;
} }
static bool fsp_reset_requested(enum fsp_status status)
{
return (status >= FSP_STATUS_RESET_REQUIRED_COLD &&
status <= FSP_STATUS_RESET_REQUIRED_8);
}
void fsp_handle_reset(enum fsp_status status) void fsp_handle_reset(enum fsp_status status)
{ {
if (!fsp_reset_requested(status))
return;
printk(BIOS_DEBUG, "FSP: handling reset type %x\n", status);
switch(status) { switch(status) {
case FSP_STATUS_RESET_REQUIRED_COLD: case FSP_STATUS_RESET_REQUIRED_COLD:
hard_reset(); hard_reset();
@ -143,16 +154,15 @@ void fsp_handle_reset(enum fsp_status status)
case FSP_STATUS_RESET_REQUIRED_WARM: case FSP_STATUS_RESET_REQUIRED_WARM:
soft_reset(); soft_reset();
break; break;
case FSP_STATUS_RESET_REQUIRED_GLOBAL_RESET: case FSP_STATUS_RESET_REQUIRED_3:
global_reset(); case FSP_STATUS_RESET_REQUIRED_4:
case FSP_STATUS_RESET_REQUIRED_5:
case FSP_STATUS_RESET_REQUIRED_6:
case FSP_STATUS_RESET_REQUIRED_7:
case FSP_STATUS_RESET_REQUIRED_8:
chipset_handle_reset(status);
break; break;
default: default:
break; break;
} }
} }
bool fsp_reset_requested(enum fsp_status status)
{
return (status >= FSP_STATUS_RESET_REQUIRED_COLD &&
status <= FSP_STATUS_RESET_REQUIRED_GLOBAL_RESET);
}

View File

@ -412,7 +412,6 @@ static void fsp_notify_dummy(void *arg)
if ((ret = fsp_notify(ph)) != FSP_SUCCESS) { if ((ret = fsp_notify(ph)) != FSP_SUCCESS) {
printk(BIOS_CRIT, "FspNotify failed, ret = %x!\n", ret); printk(BIOS_CRIT, "FspNotify failed, ret = %x!\n", ret);
if (fsp_reset_requested(ret))
fsp_handle_reset(ret); fsp_handle_reset(ret);
} }
/* Call END_OF_FIRMWARE Notify after READY_TO_BOOT Notify */ /* Call END_OF_FIRMWARE Notify after READY_TO_BOOT Notify */

View File

@ -15,6 +15,7 @@
#include <console/console.h> #include <console/console.h>
#include <delay.h> #include <delay.h>
#include <fsp/util.h>
#include <reset.h> #include <reset.h>
#include <soc/heci.h> #include <soc/heci.h>
#include <soc/pm.h> #include <soc/pm.h>
@ -57,3 +58,16 @@ void reset_prepare(void)
} }
printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw)); printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw));
} }
void chipset_handle_reset(enum fsp_status status)
{
switch(status) {
case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */
global_reset();
break;
default:
printk(BIOS_ERR, "unhandled reset type %x\n", status);
die("unknown reset type");
break;
}
}