AMD Agesa: delete no-op bootblock files

Removes files:
  src/northbridge/amd/agesa/family10/bootblock.c
  src/northbridge/amd/agesa/family12/bootblock.c
  src/northbridge/amd/agesa/family14/bootblock.c
  src/northbridge/amd/agesa/family15/bootblock.c

Change-Id: Ic3617a673b38d065ca272c4de8ef765ecd3f98b1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/793
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Kyösti Mälkki 2012-03-16 15:54:18 +02:00 committed by Patrick Georgi
parent d11ca1d08d
commit 3ae1c65127
8 changed files with 0 additions and 126 deletions

View File

@ -41,9 +41,6 @@ config MMCONF_BASE_ADDRESS
config MMCONF_BUS_NUMBER
int
default 256
config BOOTBLOCK_NORTHBRIDGE_INIT
string
default "northbridge/amd/agesa/family10/bootblock.c"
endif #NORTHBRIDGE_AMD_AGESA_FAMILY10
source "src/northbridge/amd/agesa/family10/root_complex/Kconfig"

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@ -1,29 +0,0 @@
/*
*****************************************************************************
*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
* ***************************************************************************
*
*/
#include <arch/io.h>
#include <arch/romcc_io.h>
#include <device/pci_def.h>
static void bootblock_northbridge_init(void) {
}

View File

@ -73,7 +73,3 @@ if DIMM_DDR3
endif
endif
config BOOTBLOCK_NORTHBRIDGE_INIT
string
default "northbridge/amd/agesa/family12/bootblock.c"
depends on NORTHBRIDGE_AMD_AGESA_FAMILY12

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@ -1,29 +0,0 @@
/*
*****************************************************************************
*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
* ***************************************************************************
*
*/
#include <arch/io.h>
#include <arch/romcc_io.h>
#include <device/pci_def.h>
static void bootblock_northbridge_init(void) {
}

View File

@ -39,8 +39,4 @@ config MMCONF_BUS_NUMBER
int
default 16
config BOOTBLOCK_NORTHBRIDGE_INIT
string
default "northbridge/amd/agesa/family14/bootblock.c"
endif

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@ -1,29 +0,0 @@
/*
*****************************************************************************
*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
* ***************************************************************************
*
*/
#include <arch/io.h>
#include <arch/romcc_io.h>
#include <device/pci_def.h>
static void bootblock_northbridge_init(void) {
}

View File

@ -41,9 +41,6 @@ config MMCONF_BASE_ADDRESS
config MMCONF_BUS_NUMBER
int
default 64
config BOOTBLOCK_NORTHBRIDGE_INIT
string
default "northbridge/amd/agesa/family15/bootblock.c"
endif #NORTHBRIDGE_AMD_AGESA_FAMILY15
source "src/northbridge/amd/agesa/family15/root_complex/Kconfig"

View File

@ -1,25 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <arch/romcc_io.h>
#include <device/pci_def.h>
static void bootblock_northbridge_init(void) {
}