AMD Agesa: delete no-op bootblock files
Removes files: src/northbridge/amd/agesa/family10/bootblock.c src/northbridge/amd/agesa/family12/bootblock.c src/northbridge/amd/agesa/family14/bootblock.c src/northbridge/amd/agesa/family15/bootblock.c Change-Id: Ic3617a673b38d065ca272c4de8ef765ecd3f98b1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/793 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Kyösti Mälkki
Patrick Georgi
parent
d11ca1d08d
commit
3ae1c65127
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@ -41,9 +41,6 @@ config MMCONF_BASE_ADDRESS
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config MMCONF_BUS_NUMBER
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config MMCONF_BUS_NUMBER
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int
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int
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default 256
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default 256
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config BOOTBLOCK_NORTHBRIDGE_INIT
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string
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default "northbridge/amd/agesa/family10/bootblock.c"
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endif #NORTHBRIDGE_AMD_AGESA_FAMILY10
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endif #NORTHBRIDGE_AMD_AGESA_FAMILY10
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source "src/northbridge/amd/agesa/family10/root_complex/Kconfig"
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source "src/northbridge/amd/agesa/family10/root_complex/Kconfig"
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@ -1,29 +0,0 @@
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/*
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*****************************************************************************
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*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* ***************************************************************************
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*
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*/
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#include <arch/io.h>
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#include <arch/romcc_io.h>
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#include <device/pci_def.h>
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static void bootblock_northbridge_init(void) {
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}
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@ -73,7 +73,3 @@ if DIMM_DDR3
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endif
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endif
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endif
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endif
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config BOOTBLOCK_NORTHBRIDGE_INIT
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string
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default "northbridge/amd/agesa/family12/bootblock.c"
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depends on NORTHBRIDGE_AMD_AGESA_FAMILY12
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@ -1,29 +0,0 @@
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/*
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*****************************************************************************
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*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* ***************************************************************************
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*
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*/
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#include <arch/io.h>
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#include <arch/romcc_io.h>
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#include <device/pci_def.h>
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static void bootblock_northbridge_init(void) {
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}
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@ -39,8 +39,4 @@ config MMCONF_BUS_NUMBER
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int
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int
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default 16
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default 16
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config BOOTBLOCK_NORTHBRIDGE_INIT
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string
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default "northbridge/amd/agesa/family14/bootblock.c"
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endif
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endif
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@ -1,29 +0,0 @@
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/*
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*****************************************************************************
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*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* ***************************************************************************
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*
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*/
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#include <arch/io.h>
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#include <arch/romcc_io.h>
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#include <device/pci_def.h>
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static void bootblock_northbridge_init(void) {
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}
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@ -41,9 +41,6 @@ config MMCONF_BASE_ADDRESS
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config MMCONF_BUS_NUMBER
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config MMCONF_BUS_NUMBER
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int
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int
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default 64
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default 64
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config BOOTBLOCK_NORTHBRIDGE_INIT
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string
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default "northbridge/amd/agesa/family15/bootblock.c"
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endif #NORTHBRIDGE_AMD_AGESA_FAMILY15
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endif #NORTHBRIDGE_AMD_AGESA_FAMILY15
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source "src/northbridge/amd/agesa/family15/root_complex/Kconfig"
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source "src/northbridge/amd/agesa/family15/root_complex/Kconfig"
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@ -1,25 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
|
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
|
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <arch/romcc_io.h>
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#include <device/pci_def.h>
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static void bootblock_northbridge_init(void) {
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}
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