src/arch/x86/exit_car: Add proper x86_64 code
Don't truncate upper bits in assembly code and thus allow loading of postcar stage above 4GiB. Tested on qemu with cbmem_top set to TOUUD. Change-Id: I42d1086f1220e44076ccf613244fc3c6d804805b Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Benjamin Doron <benjamin.doron@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79162 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -67,8 +67,14 @@ skip_clflush:
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invd
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invd
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movl $_estack, %esp
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movl $_estack, %esp
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#if ENV_X86_64
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/* Align stack to 16 bytes at call instruction. */
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movq $0xfffffffffffffff0, %rax
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and %rax, %rsp
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#else
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/* Align stack to 16 bytes at call instruction. */
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/* Align stack to 16 bytes at call instruction. */
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andl $0xfffffff0, %esp
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andl $0xfffffff0, %esp
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#endif
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/* Call this in assembly as some platforms like to mess with the bootflow and
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/* Call this in assembly as some platforms like to mess with the bootflow and
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call into main directly from chipset_teardown_car. */
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call into main directly from chipset_teardown_car. */
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