soc/intel/cannonlake/acpi: Replace Store(a,b) with ASL 2.0 syntax
Replace `Store (a, b)` with `b = a`. Change-Id: I9ddb71d93781c813a69dc72ce0589ffaea7b64c7 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70686 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Felix Singer
parent
8cc2962b12
commit
3dc4d84586
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@ -30,20 +30,20 @@ Device (GPIO)
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/* GPIO Community 0 */
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CreateDWordField (^RBUF, ^COM0._BAS, BAS0)
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CreateDWordField (^RBUF, ^COM0._LEN, LEN0)
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Store (^^PCRB (PID_GPIOCOM0), BAS0)
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Store (GPIO_BASE_SIZE, LEN0)
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BAS0 = ^^PCRB (PID_GPIOCOM0)
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LEN0 = GPIO_BASE_SIZE
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/* GPIO Community 1 */
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CreateDWordField (^RBUF, ^COM1._BAS, BAS1)
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CreateDWordField (^RBUF, ^COM1._LEN, LEN1)
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Store (^^PCRB (PID_GPIOCOM1), BAS1)
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Store (GPIO_BASE_SIZE, LEN1)
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BAS1 = ^^PCRB (PID_GPIOCOM1)
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LEN1 = GPIO_BASE_SIZE
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/* GPIO Community 4 */
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CreateDWordField (^RBUF, ^COM4._BAS, BAS4)
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CreateDWordField (^RBUF, ^COM4._LEN, LEN4)
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Store (^^PCRB (PID_GPIOCOM4), BAS4)
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Store (GPIO_BASE_SIZE, LEN4)
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BAS4 = ^^PCRB (PID_GPIOCOM4)
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LEN4 = GPIO_BASE_SIZE
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Return (RBUF)
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}
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@ -63,34 +63,34 @@ Method (GADD, 1, NotSerialized)
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/* GPIO Community 0 */
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If (Arg0 >= GPP_A0 && Arg0 <= SPI0_CLK_LOOPBK)
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{
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Store (PID_GPIOCOM0, Local0)
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Local0 = PID_GPIOCOM0
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Local1 = Arg0 - GPP_A0
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}
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/* GPIO Community 1 */
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If (Arg0 >= GPP_D0 && Arg0 <= vSD3_CD_B)
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{
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Store (PID_GPIOCOM1, Local0)
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Local0 = PID_GPIOCOM1
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Local1 = Arg0 - GPP_D0
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}
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/* GPIO Community 2 */
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If (Arg0 >= GPD0 && Arg0 <= DRAM_RESET_B)
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{
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Store (PID_GPIOCOM2, Local0)
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Local0 = PID_GPIOCOM2
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Local1 = Arg0 - GPD0
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}
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/* GPIO Community 3 */
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If (Arg0 >= HDA_BCLK && Arg0 <= TRIGGER_OUT)
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{
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Store (PID_GPIOCOM3, Local0)
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Local0 = PID_GPIOCOM3
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Local1 = Arg0 - HDA_BCLK
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}
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/* GPIO Community 4*/
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If (Arg0 >= GPP_C0 && Arg0 <= CL_RST_B)
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{
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Store (PID_GPIOCOM4, Local0)
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Local0 = PID_GPIOCOM4
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Local1 = Arg0 - GPP_C0
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}
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Store (PCRB (Local0), Local2)
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Local2 = PCRB (Local0)
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Local2 += PAD_CFG_BASE
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Return (Local2 + Local1 * 16)
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}
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@ -105,19 +105,19 @@ Method (GPID, 1, Serialized)
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Switch (ToInteger (Arg0))
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{
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Case (0) {
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Store (PID_GPIOCOM0, Local0)
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Local0 = PID_GPIOCOM0
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}
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Case (1) {
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Store (PID_GPIOCOM1, Local0)
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Local0 = PID_GPIOCOM1
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}
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Case (2) {
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Store (PID_GPIOCOM2, Local0)
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Local0 = PID_GPIOCOM2
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}
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Case (3) {
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Store (PID_GPIOCOM3, Local0)
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Local0 = PID_GPIOCOM3
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}
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Case (4) {
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Store (PID_GPIOCOM4, Local0)
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Local0 = PID_GPIOCOM4
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}
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Default {
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Return (0)
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@ -135,7 +135,7 @@ Method (GPID, 1, Serialized)
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*/
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Method (CGPM, 2, Serialized)
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{
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Store (GPID (Arg0), Local0)
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Local0 = GPID (Arg0)
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If (Local0 != 0) {
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/* Mask off current PM bits */
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PCRA (Local0, GPIO_MISCCFG, Not (MISCCFG_GPIO_PM_CONFIG_BITS))
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@ -30,26 +30,26 @@ Device (GPIO)
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/* GPIO Community 0 */
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CreateDWordField (^RBUF, ^COM0._BAS, BAS0)
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CreateDWordField (^RBUF, ^COM0._LEN, LEN0)
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Store (^^PCRB (PID_GPIOCOM0), BAS0)
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Store (GPIO_BASE_SIZE, LEN0)
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BAS0 = ^^PCRB (PID_GPIOCOM0)
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LEN0 = GPIO_BASE_SIZE
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/* GPIO Community 1 */
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CreateDWordField (^RBUF, ^COM1._BAS, BAS1)
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CreateDWordField (^RBUF, ^COM1._LEN, LEN1)
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Store (^^PCRB (PID_GPIOCOM1), BAS1)
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Store (GPIO_BASE_SIZE, LEN1)
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BAS1 = ^^PCRB (PID_GPIOCOM1)
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LEN1 = GPIO_BASE_SIZE
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/* GPIO Community 3 */
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CreateDWordField (^RBUF, ^COM3._BAS, BAS3)
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CreateDWordField (^RBUF, ^COM3._LEN, LEN3)
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Store (^^PCRB (PID_GPIOCOM3), BAS3)
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Store (GPIO_BASE_SIZE, LEN3)
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BAS3 = ^^PCRB (PID_GPIOCOM3)
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LEN3 = GPIO_BASE_SIZE
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/* GPIO Community 4 */
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CreateDWordField (^RBUF, ^COM4._BAS, BAS4)
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CreateDWordField (^RBUF, ^COM4._LEN, LEN4)
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Store (^^PCRB (PID_GPIOCOM4), BAS4)
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Store (GPIO_BASE_SIZE, LEN4)
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BAS4 = ^^PCRB (PID_GPIOCOM4)
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LEN4 = GPIO_BASE_SIZE
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Return (RBUF)
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}
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@ -69,28 +69,28 @@ Method (GADD, 1, NotSerialized)
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/* GPIO Community 0 */
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If (Arg0 >= GPP_A0 && Arg0 <= GSPI1_CLK_LOOPBK)
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{
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Store (PID_GPIOCOM0, Local0)
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Local0 = PID_GPIOCOM0
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Local1 = Arg0 - GPP_A0
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}
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/* GPIO Community 1 */
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If (Arg0 >= GPP_C0 && Arg0 <= vSSP2_RXD)
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{
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Store (PID_GPIOCOM1, Local0)
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Local0 = PID_GPIOCOM1
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Local1 = Arg0 - GPP_C0
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}
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/* GPIO Community 3*/
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If (Arg0 >= GPP_K0 && Arg0 <= SPI0_CLK_LOOPBK)
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{
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Store (PID_GPIOCOM3, Local0)
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Local0 = PID_GPIOCOM3
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Local1 = Arg0 - GPP_K0
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}
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/* GPIO Community 4*/
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If (Arg0 >= HDACPU_SDI && Arg0 <= GPP_J11)
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{
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Store (PID_GPIOCOM4, Local0)
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Local0 = PID_GPIOCOM4
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Local1 = Arg0 - GPP_I0
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}
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Store (PCRB (Local0), Local2)
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Local2 = PCRB (Local0)
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Local2 += PAD_CFG_BASE
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Return (Local2 + Local1 * 16)
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}
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@ -55,9 +55,9 @@ Device (HDAS)
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CreateQWordField (NBUF, ^NHLT._MAX, NMAS)
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CreateQWordField (NBUF, ^NHLT._LEN, NLEN)
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Store (NHLA, NBAS)
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Store (NHLA, NMAS)
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Store (NHLL, NLEN)
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NBAS = NHLA
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NMAS = NHLA
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NLEN = NHLL
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Return (NBUF)
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}
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@ -39,22 +39,22 @@ Scope (\_SB.PCI0) {
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Method(_PS0, 0, Serialized) {
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Stall (50) // Sleep 50 us
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Store(0, PGEN) // Disable PG
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PGEN = 0 // Disable PG
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/* Clear register 0x1C20/0x4820 */
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^^SCSC (PID_EMMC)
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/* Set Power State to D0 */
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And (PMCR, 0xFFFC, PMCR)
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Store (PMCR, ^TEMP)
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^TEMP = PMCR
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}
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Method(_PS3, 0, Serialized) {
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Store(1, PGEN) // Enable PG
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PGEN = 1 // Enable PG
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/* Set Power State to D3 */
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Or (PMCR, 0x0003, PMCR)
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Store (PMCR, ^TEMP)
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^TEMP = PMCR
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}
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Device (CARD)
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@ -203,14 +203,14 @@ Scope (\_SB.PCI0) {
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Method (_PS0, 0, Serialized)
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{
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Store (0, PGEN) /* Disable PG */
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PGEN = 0 /* Disable PG */
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/* Clear register 0x1C20/0x4820 */
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^^SCSC (PID_SDX)
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/* Set Power State to D0 */
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And (PMCR, 0xFFFC, PMCR)
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Store (PMCR, ^TEMP)
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^TEMP = PMCR
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#if CONFIG(MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE)
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/* Change pad mode to Native */
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@ -220,11 +220,11 @@ Scope (\_SB.PCI0) {
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Method (_PS3, 0, Serialized)
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{
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Store (1, PGEN) /* Enable PG */
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PGEN = 1 /* Enable PG */
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/* Set Power State to D3 */
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Or (PMCR, 0x0003, PMCR)
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Store (PMCR, ^TEMP)
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^TEMP = PMCR
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#if CONFIG(MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE)
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/* Change pad mode to GPIO control */
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