GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/brya/var/anahera{4es}: Configure Acoustic noise mitigation 

Enable Acoustic noise mitigation and set slew rate to 1/8

BUG=b:223082189
TEST=build and verified by power team

Change-Id: I256cc57fb54e5d62e22470a01e7efef359d57083
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62633
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Wisley Chen 2022-03-07 12:58:13 +06:00 committed by Felix Held
parent a1b9f9f611
commit 3e5518d72b
2 changed files with 14 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
src/mainboard/google/brya/variants/anahera/overridetree.cb
View File

@ -23,6 +23,13 @@ fw_config
end end
chip soc/intel/alderlake chip soc/intel/alderlake
register "SaGv" = "SaGv_Enabled" register "SaGv" = "SaGv_Enabled"
# Acoustic settings
register "AcousticNoiseMitigation" = "1"
register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1"
# Intel Common SoC Config # Intel Common SoC Config
#+-------------------+---------------------------+ #+-------------------+---------------------------+
#| Field | Value | #| Field | Value |

7
src/mainboard/google/brya/variants/anahera4es/overridetree.cb
View File

@ -23,6 +23,13 @@ fw_config
end end
chip soc/intel/alderlake chip soc/intel/alderlake
register "SaGv" = "SaGv_Enabled" register "SaGv" = "SaGv_Enabled"
# Acoustic settings
register "AcousticNoiseMitigation" = "1"
register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1"
# Intel Common SoC Config # Intel Common SoC Config
#+-------------------+---------------------------+ #+-------------------+---------------------------+
#| Field | Value | #| Field | Value |