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intel/socket_mPGA604 intel/e7505: Switch to POSTCAR_STAGE 

Change-Id: Ie522e8fda1d6e80cc45c990ff19a5050165d8030
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26748
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki 2018-06-01 06:32:20 +03:00
parent 6a8ce0d250
commit 3e893bbed5
4 changed files with 10 additions and 11 deletions
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4
src/cpu/intel/socket_mPGA604/Makefile.inc
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@ -9,10 +9,6 @@ subdirs-y += ../../x86/smm
subdirs-y += ../microcode subdirs-y += ../microcode
subdirs-y += ../hyperthreading subdirs-y += ../hyperthreading
ifneq ($(CONFIG_POSTCAR_STAGE),y)
cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram_ht.inc
else
cpu_incs-y += $(src)/cpu/intel/car/p4-netburst/cache_as_ram.S cpu_incs-y += $(src)/cpu/intel/car/p4-netburst/cache_as_ram.S
postcar-y += ../car/p4-netburst/exit_car.S postcar-y += ../car/p4-netburst/exit_car.S
endif
romstage-y += ../car/romstage.c romstage-y += ../car/romstage.c

1
src/northbridge/intel/e7505/Kconfig
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@ -23,6 +23,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select NO_MMCONF_SUPPORT select NO_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_RAM_SETUP
select RELOCATABLE_RAMSTAGE select RELOCATABLE_RAMSTAGE
select POSTCAR_STAGE
config HW_SCRUBBER config HW_SCRUBBER
bool bool

2
src/northbridge/intel/e7505/Makefile.inc
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@ -6,4 +6,6 @@ ramstage-y += memmap.c
romstage-y += raminit.c romstage-y += raminit.c
romstage-y += debug.c romstage-y += debug.c
romstage-y += memmap.c romstage-y += memmap.c
postcar-y += memmap.c
endif endif

14
src/northbridge/intel/e7505/memmap.c
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@ -37,9 +37,10 @@ void *cbmem_top(void)
#define ROMSTAGE_RAM_STACK_SIZE 0x5000 #define ROMSTAGE_RAM_STACK_SIZE 0x5000
/* setup_stack_and_mtrrs() determines the stack to use after /* platform_enter_postcar() determines the stack to use after
* cache-as-ram is torn down as well as the MTRR settings to use. */ * cache-as-ram is torn down as well as the MTRR settings to use,
void *setup_stack_and_mtrrs(void) * and continues execution in postcar stage. */
void platform_enter_postcar(void)
{ {
struct postcar_frame pcf; struct postcar_frame pcf;
uintptr_t top_of_ram; uintptr_t top_of_ram;
@ -59,8 +60,7 @@ void *setup_stack_and_mtrrs(void)
postcar_frame_add_mtrr(&pcf, top_of_ram - 8*MiB, 8*MiB, postcar_frame_add_mtrr(&pcf, top_of_ram - 8*MiB, 8*MiB,
MTRR_TYPE_WRBACK); MTRR_TYPE_WRBACK);
/* Save the number of MTRRs to setup. Return the stack location run_postcar_phase(&pcf);
* pointing to the number of MTRRs.
*/ /* We do not return here. */
return postcar_commit_mtrrs(&pcf);
} }