drivers/uart: Enable debug serial output during postcar
Build the UART drivers for the postcar stage. TEST=Build and run on Galileo Gen2 Change-Id: I8bf51135ab7e62fa4bc3e8d45583f2feac56942f Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15843 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -1,6 +1,7 @@
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ifeq ($(CONFIG_DRIVERS_UART),y)
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romstage-y += util.c
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postcar-y += util.c
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ramstage-y += util.c
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bootblock-y += util.c
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verstage-y += util.c
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@ -13,6 +14,7 @@ ifeq ($(CONFIG_DRIVERS_UART_8250IO),y)
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bootblock-y += uart8250io.c
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verstage-y += uart8250io.c
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romstage-y += uart8250io.c
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postcar-y += uart8250io.c
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ramstage-y += uart8250io.c
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smm-$(CONFIG_DEBUG_SMI) += uart8250io.c
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endif
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@ -21,18 +23,21 @@ ifeq ($(CONFIG_DRIVERS_UART_8250MEM),y)
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bootblock-y += uart8250mem.c
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verstage-y += uart8250mem.c
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romstage-y += uart8250mem.c
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postcar-y += uart8250mem.c
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ramstage-y += uart8250mem.c
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smm-$(CONFIG_DEBUG_SMI) += uart8250mem.c
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endif
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ifeq ($(CONFIG_DRIVERS_UART_OXPCIE),y)
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ramstage-y += oxpcie_early.c oxpcie.c
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postcar-y += oxpcie_early.c
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romstage-y += oxpcie_early.c
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endif
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ifeq ($(CONFIG_DRIVERS_UART_PL011),y)
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += pl011.c
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romstage-y += pl011.c
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postcar-y += pl011.c
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ramstage-y += pl011.c
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endif
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@ -57,7 +57,7 @@ void oxford_remap(unsigned int new_base);
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#define __CONSOLE_SERIAL_ENABLE__ CONFIG_CONSOLE_SERIAL && \
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(ENV_BOOTBLOCK || ENV_ROMSTAGE || ENV_RAMSTAGE || ENV_VERSTAGE || \
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(ENV_SMM && CONFIG_DEBUG_SMI))
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ENV_POSTCAR || (ENV_SMM && CONFIG_DEBUG_SMI))
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#if __CONSOLE_SERIAL_ENABLE__
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static inline void __uart_init(void) { uart_init(CONFIG_UART_FOR_CONSOLE); }
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