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drivers/uart: Enable debug serial output during postcar 

Build the UART drivers for the postcar stage.

TEST=Build and run on Galileo Gen2

Change-Id: I8bf51135ab7e62fa4bc3e8d45583f2feac56942f
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15843
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Lee Leahy 2016-07-24 19:22:17 -07:00
parent b8257df83b
commit 3eabe6e9ec
2 changed files with 6 additions and 1 deletions
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5
src/drivers/uart/Makefile.inc
View File

@ -1,6 +1,7 @@
ifeq ($(CONFIG_DRIVERS_UART),y)
romstage-y += util.c
postcar-y += util.c
ramstage-y += util.c
bootblock-y += util.c
verstage-y += util.c
@ -13,6 +14,7 @@ ifeq ($(CONFIG_DRIVERS_UART_8250IO),y)
bootblock-y += uart8250io.c
verstage-y += uart8250io.c
romstage-y += uart8250io.c
postcar-y += uart8250io.c
ramstage-y += uart8250io.c
smm-$(CONFIG_DEBUG_SMI) += uart8250io.c
endif
@ -21,18 +23,21 @@ ifeq ($(CONFIG_DRIVERS_UART_8250MEM),y)
bootblock-y += uart8250mem.c
verstage-y += uart8250mem.c
romstage-y += uart8250mem.c
postcar-y += uart8250mem.c
ramstage-y += uart8250mem.c
smm-$(CONFIG_DEBUG_SMI) += uart8250mem.c
endif
ifeq ($(CONFIG_DRIVERS_UART_OXPCIE),y)
ramstage-y += oxpcie_early.c oxpcie.c
postcar-y += oxpcie_early.c
romstage-y += oxpcie_early.c
endif
ifeq ($(CONFIG_DRIVERS_UART_PL011),y)
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += pl011.c
romstage-y += pl011.c
postcar-y += pl011.c
ramstage-y += pl011.c
endif

2
src/include/console/uart.h
View File

@ -57,7 +57,7 @@ void oxford_remap(unsigned int new_base);
#define __CONSOLE_SERIAL_ENABLE__ CONFIG_CONSOLE_SERIAL && \
(ENV_BOOTBLOCK || ENV_ROMSTAGE || ENV_RAMSTAGE || ENV_VERSTAGE || \
(ENV_SMM && CONFIG_DEBUG_SMI))
ENV_POSTCAR || (ENV_SMM && CONFIG_DEBUG_SMI))
#if __CONSOLE_SERIAL_ENABLE__
static inline void __uart_init(void) { uart_init(CONFIG_UART_FOR_CONSOLE); }