[RFC]util/checklist: Remove this functionality

It was only hooked up for galileo board when using the obsolete
FSP1.1. I don't see how it can be useful...

Change-Id: Ifd7cbd664cfa3b729a11c885134fd9b5de62a96c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30691
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2019-01-06 14:09:31 +01:00 committed by Patrick Georgi
parent 3d3152eec7
commit 3ef017c4d4
16 changed files with 0 additions and 757 deletions

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@ -1,160 +0,0 @@
<html>
<head>
<title>Galileo Implementation Status</title>
</title>
<body>
<h1>Galileo Implementation Status<br>2016/07/08 06:51:34 PDT</h1>
<table>
<tr><td colspan=2><b>Legend</b></td></tr>
<tr><td bgcolor="#ffc0c0">Red</td><td>Required - To-be-implemented</td></tr>
<tr><td bgcolor="#ffffc0">Yellow</td><td>Optional</td></tr>
<tr><td bgcolor="#c0ffc0">Green</td><td>Implemented</td></tr>
</table>
<table>
<tr valign="top">
<td>
<table border=1>
<tr><th colspan=2>bootblock: 100% Done</th></tr>
<tr><th>Type</th><th>Routine</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>bootblock_c_entry</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>bootblock_main_with_timestamp</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>bootblock_mainboard_early_init</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>bootblock_mainboard_init</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>bootblock_pre_c_entry</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>bootblock_protected_mode_entry</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>bootblock_soc_early_init</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>bootblock_soc_init</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>tsc_freq_mhz</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>uart_init</td></tr>
</table>
</td>
<td width=5>&nbsp;</td>
<td>
<table border=1>
<tr><th colspan=2>romstage: 67% Done</th></tr>
<tr><th>Type</th><th>Routine</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>arch_segment_loaded</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>backup_top_of_ram</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>boot_device_init</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>car_mainboard_post_console_init</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>car_mainboard_pre_console_init</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>car_soc_post_console_init</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>car_soc_pre_console_init</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>car_stage_entry</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>cbfs_master_header_locator</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>cbmem_fail_resume</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>clear_recovery_mode_switch</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>cpu_smi_handler</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>fill_power_state</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>get_sw_write_protect_state</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>get_top_of_ram</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>gpio_acpi_path</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>init_timer</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_add_dimm_info</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_check_ec_image</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>mainboard_fill_spd_data</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_io_trap_handler</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>mainboard_memory_init_params</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_post</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>mainboard_romstage_entry</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_save_dimm_info</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_smi_apmc</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_smi_gpi</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_smi_sleep</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>map_oprom_vendev</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>migrate_power_state</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>mrc_cache_get_current_with_version</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>mrc_cache_stash_data_with_version</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>platform_prog_run</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>platform_segment_loaded</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>print_fsp_info</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>raminit</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>ramstage_cache_invalid</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>report_memory_config</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>romstage_common</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>save_chromeos_gpios</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>set_max_freq</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>setup_stack_and_mtrrs</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>smm_region</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>smm_region_size</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>soc_after_ram_init</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>soc_display_memory_init_params</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>soc_memory_init_params</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>soc_pre_ram_init</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>southbridge_smi_handler</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>stage_cache_add</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>stage_cache_load_stage</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>timestamp_get</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>tsc_freq_mhz</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>vb2ex_hwcrypto_digest_extend</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>vb2ex_hwcrypto_digest_finalize</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>vb2ex_hwcrypto_digest_init</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>vboot_platform_prepare_reboot</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>verstage_mainboard_init</td></tr>
</table>
</td>
<td width=5>&nbsp;</td>
<td>
<table border=1>
<tr><th colspan=2>ramstage: 60% Done</th></tr>
<tr><th>Type</th><th>Routine</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>acpi_create_serialio_ssdt</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>arch_segment_loaded</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>backup_top_of_ram</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>boot_device_init</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>cbfs_master_header_locator</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>cbmem_fail_resume</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>clear_recovery_mode_switch</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>cpu_smi_handler</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>fw_cfg_acpi_tables</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>get_sw_write_protect_state</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>get_top_of_ram</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>gpio_acpi_path</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>init_timer</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>lb_board</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>lb_framebuffer</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_add_dimm_info</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_io_trap_handler</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_post</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_silicon_init_params</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_smi_apmc</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_smi_gpi</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_smi_sleep</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mainboard_suspend_resume</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>map_oprom_vendev</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>mirror_payload</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>northbridge_smi_handler</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>nvm_mmio_to_flash_offset</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>platform_prog_run</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>platform_segment_loaded</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>save_chromeos_gpios</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>smbios_mainboard_bios_version</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>smbios_mainboard_manufacturer</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>smbios_mainboard_product_name</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>smbios_mainboard_serial_number</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>smbios_mainboard_set_uuid</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>smbios_mainboard_version</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>smm_disable_busmaster</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>soc_after_silicon_init</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>soc_display_silicon_init_params</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>soc_fill_acpi_wake</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>soc_silicon_init_params</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>soc_skip_ucode_update</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>southbridge_smi_handler</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>stage_cache_add</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>stage_cache_load_stage</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>timestamp_get</td></tr>
<tr bgcolor=#ffc0c0><td>Required</td><td>timestamp_tick_freq_mhz</td></tr>
<tr bgcolor=#c0ffc0><td>Required</td><td>tsc_freq_mhz</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>vb2ex_hwcrypto_digest_extend</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>vb2ex_hwcrypto_digest_finalize</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>vb2ex_hwcrypto_digest_init</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>wifi_regulatory_domain</td></tr>
<tr bgcolor=#ffffc0><td>Optional</td><td>write_smp_table</td></tr>
</table>
</td>
<td width=5>&nbsp;</td>
</tr>
</table>
</body>
</html>

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@ -17,7 +17,6 @@
<li><a target="_blank" href="../SoC/soc.html">SoC</a> support</li>
<li><a target="_blank" href="../fsp1_1.html">FSP 1.1</a> integration</li>
<li><a target="_blank" href="board.html">Board</a> support</li>
<li><a target="_blank" href="Galileo_checklist.html">Implementation Checklist</a></li>
</ul>
</td>
</tr>

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@ -1091,36 +1091,6 @@ config MAX_REBOOT_CNT
with the normal image enabled before assuming the normal image is defective
and switching to the fallback image.
config CREATE_BOARD_CHECKLIST
bool
default n
help
When selected, creates a webpage showing the implementation status for
the board. Routines highlighted in green are complete, yellow are
optional and red are required and must be implemented. A table is
produced for each stage of the boot process except the bootblock. The
red items may be used as an implementation checklist for the board.
config MAKE_CHECKLIST_PUBLIC
bool
default n
help
When selected, build/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html
is copied into the Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board
directory.
config CHECKLIST_DATA_FILE_LOCATION
string
help
Location of the <stage>_complete.dat and <stage>_optional.dat files
that are consumed during checklist processing. <stage>_complete.dat
contains the symbols that are expected to be in the resulting image.
<stage>_optional.dat is a subset of <stage>_complete.dat and contains
a list of weak symbols which the resulting image may consume. Other
symbols contained only in <stage>_complete.dat will be flagged as
required and not implemented if a weak implementation is found in the
resulting image.
config UNCOMPRESSED_RAMSTAGE
bool

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@ -86,10 +86,6 @@ config USE_GENERIC_FSP_CAR_INC
The chipset can select this to use a generic cache_as_ram.inc file
that should be good for all FSP based platforms.
config CHECKLIST_DATA_FILE_LOCATION
string
default "src/vendorcode/intel/fsp/fsp1_1/checklist"
config RESET_ON_INVALID_RAMSTAGE_CACHE
bool "Reset the system on S3 wake when ramstage cache invalid."
default n

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@ -146,10 +146,6 @@ config VERIFY_HOBS
Verify that the HOBs required by coreboot are returned by FSP and
that the resource HOBs are in the correct order and position.
config CHECKLIST_DATA_FILE_LOCATION
string
default "src/vendorcode/intel/fsp/fsp2_0/checklist"
config RESET_ON_INVALID_RAMSTAGE_CACHE
bool "Reset the system on S3 wake when ramstage cache invalid."
default n

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@ -18,7 +18,6 @@ if BOARD_INTEL_GALILEO
config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_8192
# select CREATE_BOARD_CHECKLIST
select ENABLE_BUILTIN_HSUART1
select HAVE_ACPI_TABLES
select SOC_INTEL_QUARK
@ -52,7 +51,6 @@ choice
config FSP_VERSION_1_1
bool "FSP 1.1"
select CREATE_BOARD_CHECKLIST
select PLATFORM_USES_FSP1_1
# select ADD_FSP_RAW_BIN
help

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@ -1,10 +0,0 @@
bootblock_c_entry
bootblock_mainboard_early_init
bootblock_mainboard_init
bootblock_main_with_timestamp
bootblock_pre_c_entry
bootblock_protected_mode_entry
bootblock_soc_early_init
bootblock_soc_init
tsc_freq_mhz
uart_init

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@ -1,6 +0,0 @@
bootblock_c_entry
bootblock_mainboard_early_init
bootblock_mainboard_init
bootblock_soc_early_init
bootblock_soc_init
uart_init

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@ -1,53 +0,0 @@
acpi_create_serialio_ssdt
arch_segment_loaded
backup_top_of_ram
boot_device_init
cbfs_master_header_locator
cbmem_fail_resume
clear_recovery_mode_switch
cpu_smi_handler
fw_cfg_acpi_tables
get_sw_write_protect_state
get_top_of_ram
gpio_acpi_path
init_timer
lb_board
lb_framebuffer
mainboard_add_dimm_info
mainboard_io_trap_handler
mainboard_post
mainboard_silicon_init_params
mainboard_smi_apmc
mainboard_smi_gpi
mainboard_smi_sleep
mainboard_suspend_resume
map_oprom_vendev
mirror_payload
northbridge_smi_handler
nvm_mmio_to_flash_offset
platform_prog_run
platform_segment_loaded
save_chromeos_gpios
smbios_mainboard_bios_version
smbios_mainboard_manufacturer
smbios_mainboard_product_name
smbios_mainboard_serial_number
smbios_mainboard_set_uuid
smbios_mainboard_version
smm_disable_busmaster
soc_after_silicon_init
soc_display_silicon_init_params
soc_fill_acpi_wake
soc_silicon_init_params
soc_skip_ucode_update
southbridge_smi_handler
stage_cache_add
stage_cache_load_stage
timestamp_get
timestamp_tick_freq_mhz
tsc_freq_mhz
vb2ex_hwcrypto_digest_extend
vb2ex_hwcrypto_digest_finalize
vb2ex_hwcrypto_digest_init
wifi_regulatory_domain
write_smp_table

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@ -1,46 +0,0 @@
arch_segment_loaded
backup_top_of_ram
boot_device_init
cbmem_fail_resume
clear_recovery_mode_switch
cpu_smi_handler
fw_cfg_acpi_tables
get_sw_write_protect_state
get_top_of_ram
gpio_acpi_path
lb_board
lb_framebuffer
mainboard_add_dimm_info
mainboard_io_trap_handler
mainboard_post
mainboard_silicon_init_params
mainboard_smi_apmc
mainboard_smi_gpi
mainboard_smi_sleep
mainboard_suspend_resume
map_oprom_vendev
mirror_payload
northbridge_smi_handler
nvm_mmio_to_flash_offset
platform_prog_run
platform_segment_loaded
save_chromeos_gpios
smbios_mainboard_bios_version
smbios_mainboard_manufacturer
smbios_mainboard_product_name
smbios_mainboard_serial_number
smbios_mainboard_set_uuid
smbios_mainboard_version
smm_disable_busmaster
soc_after_silicon_init
soc_display_silicon_init_params
soc_silicon_init_params
soc_skip_ucode_update
southbridge_smi_handler
stage_cache_add
stage_cache_load_stage
vb2ex_hwcrypto_digest_extend
vb2ex_hwcrypto_digest_finalize
vb2ex_hwcrypto_digest_init
wifi_regulatory_domain
write_smp_table

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@ -1,53 +0,0 @@
arch_segment_loaded
backup_top_of_ram
boot_device_init
car_stage_entry
cbfs_master_header_locator
cbmem_fail_resume
clear_recovery_mode_switch
cpu_smi_handler
fill_power_state
get_sw_write_protect_state
get_top_of_ram
gpio_acpi_path
init_timer
mainboard_add_dimm_info
mainboard_check_ec_image
mainboard_fill_spd_data
mainboard_io_trap_handler
mainboard_memory_init_params
mainboard_post
mainboard_romstage_entry
mainboard_save_dimm_info
mainboard_smi_apmc
mainboard_smi_gpi
mainboard_smi_sleep
map_oprom_vendev
migrate_power_state
mrc_cache_get_current_with_version
mrc_cache_stash_data_with_version
platform_prog_run
platform_segment_loaded
print_fsp_info
raminit
ramstage_cache_invalid
report_memory_config
romstage_common
save_chromeos_gpios
set_max_freq
setup_stack_and_mtrrs
smm_region
smm_region_size
soc_after_ram_init
soc_display_memory_init_params
soc_memory_init_params
soc_pre_ram_init
southbridge_smi_handler
stage_cache_add
stage_cache_load_stage
timestamp_get
tsc_freq_mhz
vb2ex_hwcrypto_digest_extend
vb2ex_hwcrypto_digest_finalize
vb2ex_hwcrypto_digest_init
vboot_platform_prepare_reboot

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@ -1,33 +0,0 @@
arch_segment_loaded
backup_top_of_ram
boot_device_init
car_stage_entry
cbmem_fail_resume
clear_recovery_mode_switch
cpu_smi_handler
get_sw_write_protect_state
get_top_of_ram
gpio_acpi_path
mainboard_add_dimm_info
mainboard_check_ec_image
mainboard_io_trap_handler
mainboard_post
mainboard_romstage_entry
mainboard_save_dimm_info
mainboard_smi_apmc
mainboard_smi_gpi
mainboard_smi_sleep
map_oprom_vendev
platform_prog_run
platform_segment_loaded
save_chromeos_gpios
soc_after_ram_init
soc_display_memory_init_params
soc_memory_init_params
soc_pre_ram_init
southbridge_smi_handler
stage_cache_add
stage_cache_load_stage
vb2ex_hwcrypto_digest_extend
vb2ex_hwcrypto_digest_finalize
vb2ex_hwcrypto_digest_init

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@ -1,33 +0,0 @@
arch_segment_loaded
backup_top_of_ram
boot_device_init
car_mainboard_post_console_init
car_mainboard_pre_console_init
car_soc_post_console_init
car_soc_pre_console_init
cbfs_master_header_locator
cbmem_fail_resume
clear_recovery_mode_switch
cpu_smi_handler
get_sw_write_protect_state
gpio_acpi_path
init_timer
mainboard_check_ec_image
mainboard_io_trap_handler
mainboard_post
mainboard_smi_apmc
mainboard_smi_gpi
mainboard_smi_sleep
map_oprom_vendev
platform_prog_run
platform_segment_loaded
save_chromeos_gpios
stage_cache_add
stage_cache_load_stage
timestamp_get
tsc_freq_mhz
vb2ex_hwcrypto_digest_extend
vb2ex_hwcrypto_digest_finalize
vb2ex_hwcrypto_digest_init
vboot_platform_prepare_reboot
verstage_mainboard_init

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@ -1,20 +0,0 @@
arch_segment_loaded
backup_top_of_ram
boot_device_init
car_mainboard_post_console_init
car_mainboard_pre_console_init
car_soc_post_console_init
car_soc_pre_console_init
mainboard_check_ec_image
mainboard_post
platform_prog_run
platform_segment_loaded
stage_cache_add
stage_cache_load_stage
timestamp_get
tsc_freq_mhz
vb2ex_hwcrypto_digest_extend
vb2ex_hwcrypto_digest_finalize
vb2ex_hwcrypto_digest_init
vboot_platform_prepare_reboot
verstage_mainboard_init

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@ -1,301 +0,0 @@
#
# This file is part of the coreboot project.
#
# Copyright (C) 2016 Intel Corporation.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
###########################################################################
# Instructions
###########################################################################
#
# Create new control files for checklist:
#
# 1. Remove any selection for CREATE_BOARD_CHECKLIST
# 2. Remove any selection for MAKE_CHECKLIST_PUBLIC
# 3. make
# 4. nm build/cbfs/fallback/<stage>.debug > <stage>_symbols.txt
# 6. sed 's/^...........//' <stage>_symbols.txt > <stage>_complete.dat
# 7. grep -F " W " <stage>_symbols.txt | sed 's/^...........//' \
# > <stage>_optional.dat
# 8. Edit <stage>_complete.dat to remove any symbols that are not
# desired in the report
# 9. Edit <stage>_optional.dat to remove any symbols that are
# required to be implemented
#
# Create a board checklist:
#
# 1. select CREATE_BOARD_CHECKLIST
# 2. Optionally: select MAKE_CHECKLIST_PUBLIC
# 3. Specify CONFIG_CHECKLIST_DATA_FILE_LOCATION
# 4. make
#
# Build Errors:
# * No checklist built - verify CREATE_BOARD_CHECKLIST is selected in
# board Kconfig file. Do a make clean
# * <stage>_complete.dat not found - verify that
# CONFIG_CHECKLIST_DATA_FILE_LOCATION points to the directory
# containing the checklist data files. Build the checklist
# data files if necessary.
# * Segmentation fault - most likely caused by $(NM_$(class)) not being
# set.
#
###########################################################################
# Build the board implementation checklist
###########################################################################
# Only build the checklist for boards under development
ifeq ($(CONFIG_CREATE_BOARD_CHECKLIST),y)
#
# Extract the symbol table from the image
#
%.symbol_table: %.elf %.debug
$(NM_$(class)) $(*D)/$(*F).debug > $@
$(NM_$(class)) $< >> $@
#
# All symbols in the image
#
# 1. Remove the address and symbol type
# 2. Sort the table into alphabetical order
# 3. Remove any duplicates
#
%.symbols: %.symbol_table
sed 's/^...........//' $< > $@.tmp
sort $@.tmp > $@.tmp2
uniq $@.tmp2 > $@
rm $@.tmp $@.tmp2
#
# Weak symbols in the image
#
# 1. Find the weak symbols
# 2. Remove the address and symbol type
# 3. Sort the table into alphabetical order
# 4. Remove any duplicates
#
%.weak: %.symbol_table
grep -F " W " $< | sed 's/^...........//' > $@.tmp
sort $@.tmp > $@.tmp2
uniq $@.tmp2 > $@
rm $@.tmp $@.tmp2
#
# Expected symbols in the image
#
# 1. Get the complete list of expected symbols in the image
# 2. Sort the table into alphabetical order
# 3. Remove any duplicates
#
%.expected: %.symbol_table
cp $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_complete.dat $@.tmp
cat $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_optional.dat >> $@.tmp
# If no separate verstage, combine verstage and romstage routines into a single list
if [ "$(*F)" = "romstage" ]; then \
if [ ! -e $(*D)/verstage.elf ]; then \
if [ ! -e $(*D)/postcar.elf ]; then \
cat $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/verstage_complete.dat >> $@.tmp; \
cat $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/verstage_optional.dat >> $@.tmp; \
fi; \
fi; \
fi
sort $@.tmp > $@.tmp2
uniq $@.tmp2 > $@
rm $@.tmp $@.tmp2
#
# Optional symbols in the image
#
# 1. Get the list of optional symbols in the image
# 2. Sort the table into alphabetical order
# 3. Remove any duplicates
#
%.optional: %.symbol_table
cp $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_optional.dat $@.tmp
# If no separate verstage, combine verstage and romstage routines into a single list
if [ "$(*F)" = "romstage" ]; then \
if [ ! -e $(*D)/verstage.elf ]; then \
if [ ! -e $(*D)/postcar.elf ]; then \
cat $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/verstage_optional.dat >> $@.tmp; \
fi; \
fi; \
fi
sort $@.tmp > $@.tmp2
uniq $@.tmp2 > $@
rm $@.tmp $@.tmp2
#
# Expected Symbols Optional Weak Done Type
# no yes no d/c yes Don't display
# yes no no no no Required - not implemented
# yes no yes no no Optional - not implemented
# yes yes yes yes no Optional - not implemented
# yes yes no no yes Required - implemented
# yes yes yes no yes Required - implemented
#
# Implemented routines are in the symbol table and are not weak
#
# 1. Remove expected symbols which are not in the image (not implemented yet)
# 2. Remove weak symbols from the list (not implemented yet)
#
%.done: %.symbols %.expected %.weak %.optional
comm -12 $(*D)/$(*F).expected $(*D)/$(*F).symbols | sed "s/^[ \t]*//" > $@.tmp
comm -23 $@.tmp $(*D)/$(*F).weak | sed "s/^[ \t]*//" > $@
rm $@.tmp
#
# Remove any routines that are implemented
#
%.optional2: %.optional %.done
comm -23 $^ | sed "s/^[ \t]*//" > $@
#
# Remove any implemented or optional routines
#
%.tbd: %.expected %.done %.optional2
comm -23 $(*D)/$(*F).expected $(*D)/$(*F).done | sed "s/^[ \t]*//" > $@.tmp
comm -23 $@.tmp $(*D)/$(*F).optional2 | sed "s/^[ \t]*//" > $@
rm $@.tmp
#
# Build the implementation table for each stage
# 1. Color code the rows
# * Done table rows are in green
# * Optional table rows are in yellow
# * TBD table rows are in red
# 2. Add the row termination
# 3. Sort the rows into alphabetical order
#
%.table_rows: %.optional2 %.done %.expected %.tbd
sed -e 's/^/<tr bgcolor=#c0ffc0><td>Required<\/td><td>/' $(*D)/$(basename $(*F)).done > $@.tmp
sed -e 's/^/<tr bgcolor=#ffffc0><td>Optional<\/td><td>/' $(*D)/$(basename $(*F)).optional2 >> $@.tmp
if [ -s $(*D)/$(basename $(*F)).tbd ]; then \
sed -e 's/^/<tr bgcolor=#ffc0c0><td>Required<\/td><td>/' $(*D)/$(basename $(*F)).tbd >> $@.tmp; \
fi
sed -e 's/$$/<\/td><\/tr>/' -i $@.tmp
sort -t ">" -k4 $@.tmp > $@
rm $@.tmp
#
# Count the lines in the done file
#
done_lines = $$(wc -l $(*D)/$(basename $(*F)).done | sed 's/ .*//')
#
# Count the lines in the optional file
#
optional_lines = $$(wc -l $(*D)/$(basename $(*F)).optional2 | sed 's/ .*//')
#
# Count the lines in the expected file
#
expected_lines = $$(wc -l $(*D)/$(basename $(*F)).expected | sed 's/ .*//')
# Compute the percentage done by routine count
percent_complete = $$(($(done_lines) * 100 / ($(expected_lines) - $(optional_lines))))
#
# Build the table
# 1. Add the table header
# 2. Add the table rows
# 3. Add the table trailer
#
%.html: %.table_rows
echo "<table border=1>" > $@
echo "<tr><th colspan=2>$(basename $(*F)): $(percent_complete)% Done</th></tr>" >> $@
echo "<tr><th>Type</th><th>Routine</td></tr>" >> $@
cat $< >> $@
echo "</table>" >> $@
#
# Determine which HTML files to include into the webpage
#
ifeq ($(CONFIG_C_ENVIRONMENT_BOOTBLOCK),y)
html_table_files += $(objcbfs)/bootblock.html
endif
ifeq ($(CONFIG_SEPARATE_VERSTAGE),y)
html_table_files += $(objcbfs)/verstage.html
endif
html_table_files += $(objcbfs)/romstage.html
ifeq ($(CONFIG_POSTCAR_STAGE),y)
html_table_files += $(objcbfs)/postcar.html
endif
html_table_files += $(objcbfs)/ramstage.html
#
# Create a list with each file on a separate line
#
list_of_html_files = $(subst _NEWLINE_,${\n},${html_table_files})
#
# Get the date for the webpage
#
current_date_time = $$(date +"%Y/%m/%d %T %Z")
#
# Build the webpage from the implementation tables
# 1. Add the header to the webpage
# 2. Add the legend to the webpage
# 3. Use a table to place stage tables side-by-side
# 4. Add the stage tables to the webpage
# 5. Separate the stage tables
# 6. Terminate the outer table
# 7. Add the trailer to the webpage
#
$(obj)/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html: $(html_table_files)
echo "<html>" > $@
echo "<head>" >> $@
echo "<title>$(CONFIG_MAINBOARD_PART_NUMBER) Implementation Status</title>" >> $@
echo "</title>" >> $@
echo "<body>" >> $@
echo "<h1>$(CONFIG_MAINBOARD_PART_NUMBER) Implementation Status<br>$(current_date_time)</h1>" >> $@
echo "<table>" >> $@
echo " <tr><td colspan=2><b>Legend</b></td></tr>" >> $@
echo " <tr><td bgcolor=\"#ffc0c0\">Red</td><td>Required - To-be-implemented</td></tr>" >> $@
echo " <tr><td bgcolor=\"#ffffc0\">Yellow</td><td>Optional</td></tr>" >> $@
echo " <tr><td bgcolor=\"#c0ffc0\">Green</td><td>Implemented</td></tr>" >> $@
echo "</table>" >> $@
echo "<table>" >> $@
echo " <tr valign=\"top\">" >> $@
for table in $(list_of_html_files); do \
echo " <td>" >> $@; \
cat $$table >> $@; \
echo " </td>" >> $@; \
echo " <td width=5>&nbsp;</td>" >> $@; \
done
echo " </tr>" >> $@
echo "</table>" >> $@
echo "</body>" >> $@
echo "</html>" >> $@
#
# Copy the output file into the Documentation directory
#
Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html: $(obj)/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html
if [ ! -d Documentation/$(CONFIG_MAINBOARD_VENDOR) ]; then \
mkdir Documentation/$(CONFIG_MAINBOARD_VENDOR); \
fi
if [ ! -d Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board ]; then \
mkdir Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board; \
fi
cp $< $@
#
# Determine where to place the output file
#
ifeq ($(CONFIG_MAKE_CHECKLIST_PUBLIC),y)
INTERMEDIATE+=Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html
else
INTERMEDIATE+=$(obj)/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html
endif
endif

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Board implementation checklist generator `Make`