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soc/intel/cannonlake: Auto turn on HDA controller 

Update HDAenable bit in Fsp memory init UPD data base on devicetree
settings.

BUG=N/A
TEST=N/A

Change-Id: I5159c00a855a2a9516714ccee8ee9933465c5063
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/30097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Lijian Zhao 2018-12-06 17:29:55 -08:00 committed by Patrick Georgi
parent 6b2c9b1751
commit 3ef7449392
2 changed files with 8 additions and 1 deletions
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1
src/soc/intel/cannonlake/chip.h
View File

@ -133,7 +133,6 @@ struct soc_intel_cannonlake_config {
uint8_t SataPortsDevSlp[8];
/* Audio related */
uint8_t PchHdaEnable;
uint8_t PchHdaDspEnable;
/* Enable/Disable HD Audio Link. Muxed with SSP0/SSP1/SNDW1 */

8
src/soc/intel/cannonlake/romstage/fsp_params.c
View File

@ -59,6 +59,14 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const config_t *config)
m_cfg->PchIshEnable = 0;
else
m_cfg->PchIshEnable = dev->enabled;
/* If HDA is enabled, enable HDA elements */
dev = dev_find_slot(0, PCH_DEVFN_HDA);
if (!dev)
m_cfg->PchHdaEnable = 0;
else
m_cfg->PchHdaEnable = dev->enabled;
}
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)