GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/lenovo/x201/dock.c: Use common southbridge gpio code 

Change-Id: I885f57f68e30c2a641e84655dc7ea9da141fb83f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36128
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2019-10-18 14:13:36 +02:00 committed by Nico Huber
parent bf6b6afa9e
commit 40377c7250
1 changed files with 6 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
src/mainboard/lenovo/x201/dock.c
View File

@ -15,14 +15,10 @@
* GNU General Public License for more details.
*/
#define __SIMPLE_DEVICE__
#include <console/console.h>
#include <arch/io.h>
#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include "dock.h"
#include <southbridge/intel/ibexpeak/pch.h>
#include <southbridge/intel/common/gpio.h>
#include <ec/lenovo/h8/h8.h>
#include <ec/acpi/ec.h>
@ -37,30 +33,25 @@ void h8_mainboard_init_dock (void)
void dock_connect(void)
{
u16 gpiobase = pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc;
ec_set_bit(0x02, 0);
ec_set_bit(0x1a, 0);
ec_set_bit(0xfe, 4);
outl(inl(gpiobase + 0x0c) | (1 << 28), gpiobase + 0x0c);
set_gpio(28, GPIO_LEVEL_HIGH);
}
void dock_disconnect(void)
{
u16 gpiobase = pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc;
ec_clr_bit(0x02, 0);
ec_clr_bit(0x1a, 0);
ec_clr_bit(0xfe, 4);
outl(inl(gpiobase + 0x0c) & ~(1 << 28), gpiobase + 0x0c);
set_gpio(28, GPIO_LEVEL_LOW);
}
int dock_present(void)
{
u16 gpiobase = pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc;
u8 st = inb(gpiobase + 0x0c);
const int dock_id_gpio[] = { 3, 4, 5, -1};
return ((st >> 3) & 7) != 7;
return get_gpios(dock_id_gpio) != 7;
}