mb/lenovo/x200/dock.c: Use common southbridge gpio code
Change-Id: I5b527a23aa0b0038936bb4b77176331fdfd6d914 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36127 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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@ -15,21 +15,14 @@
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* GNU General Public License for more details.
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*/
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#define __SIMPLE_DEVICE__
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#include <console/console.h>
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#include <arch/io.h>
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#include <device/pci_ops.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <southbridge/intel/i82801ix/i82801ix.h>
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#include <southbridge/intel/common/gpio.h>
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#include <ec/lenovo/h8/h8.h>
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#include <ec/acpi/ec.h>
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#include "dock.h"
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#define LPC_DEV PCI_DEV(0, 0x1f, 0)
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void h8_mainboard_init_dock (void)
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{
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if (dock_present()) {
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@ -41,22 +34,19 @@ void h8_mainboard_init_dock (void)
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void dock_connect(void)
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{
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u16 gpiobase = pci_read_config16(LPC_DEV, D31F0_GPIO_BASE) & 0xfffc;
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ec_set_bit(0x02, 0);
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outl(inl(gpiobase + 0x0c) | (1 << 28), gpiobase + 0x0c);
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set_gpio(28, GPIO_LEVEL_HIGH);
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}
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void dock_disconnect(void)
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{
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u16 gpiobase = pci_read_config16(LPC_DEV, D31F0_GPIO_BASE) & 0xfffc;
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ec_clr_bit(0x02, 0);
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outl(inl(gpiobase + 0x0c) & ~(1 << 28), gpiobase + 0x0c);
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set_gpio(28, GPIO_LEVEL_LOW);
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}
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int dock_present(void)
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{
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u16 gpiobase = pci_read_config16(LPC_DEV, D31F0_GPIO_BASE) & 0xfffc;
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u8 st = inb(gpiobase + 0x0c);
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const int dock_id_gpio[] = { 2, 3, 4, -1};
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return ((st >> 2) & 7) != 7;
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return get_gpios(dock_id_gpio) != 7;
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}
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