set irq options.

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2278 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich 2006-04-25 20:05:38 +00:00
parent cf120d1a89
commit 417d8c44f9
1 changed files with 3 additions and 0 deletions

View File

@ -133,6 +133,9 @@ chip northbridge/amd/gx2
device pci 1.0 on end
device pci 1.1 on end
chip southbridge/amd/cs5536
register "lpc_serirq_enable" = "0x80" # enabled with default timing
register "lpc_irq" = "((1<<3)|(1<<4))" # IRQ 3 & 4
register "enable_gpio0_inta" = "1"
device pci d.0 on end # Realtek 8139 LAN
device pci f.0 on end # ISA Bridge
device pci f.2 on end # IDE Controller