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mb/google/dedede/variants/drawcia: Increase PL2 value from 15W to 20W 

Jasper Lake SoC supports PL2 (Power Limit2) as 20W. Increase PL2 value from 15W to 20W.

BRANCH=None
BUG=b:166656373
TEST=Built and tested on drawlat system

Change-Id: I82d6792907bb1c88cc9dd57d1eaeda8421c12fb2
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45162
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sumeet R Pawnikar 2020-09-08 11:30:46 +05:30 committed by Patrick Georgi
parent 033038fd48
commit 426e07aaf2
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/dedede/variants/drawcia/overridetree.cb
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@ -59,7 +59,7 @@ chip soc/intel/jasperlake
register "power_limits_config" = "{
.tdp_pl1_override = 6,
.tdp_pl2_override = 15,
.tdp_pl2_override = 20,
}"
register "tcc_offset" = "20" # TCC of 85C
@ -93,7 +93,7 @@ chip soc/intel/jasperlake
.granularity = 200,}"
register "controls.power_limits.pl2" = "{
.min_power = 6000,
.max_power = 15000,
.max_power = 20000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 1000,}"