soc/intel/tigerlake: Re-use existing define in CrashLog implementation

TEL_CFG_BAR variables have the same value as PCI_BASE_ADDRESS.
This fix re-uses an already existing variable in crashLog.

BUG=None
TEST=CrashLog data generated, extracted, processed, decoded sucessfully on delbin.

Signed-off-by: Francois Toguo <francois.toguo.fotso@intel.com>
Change-Id: If063d1ea4189dbc5a75f37d86ce158e8f1bd808d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51096
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Francois Toguo 2021-02-25 15:04:56 -08:00 committed by Patrick Georgi
parent 98521c51f4
commit 4280b43473
1 changed files with 2 additions and 2 deletions

View File

@ -220,9 +220,9 @@ bool cpu_cl_discovery(void)
printk(BIOS_DEBUG, "tmp_bar_addr: 0x%X\n", tmp_bar_addr); printk(BIOS_DEBUG, "tmp_bar_addr: 0x%X\n", tmp_bar_addr);
if (cpu_cl_devsc_cap.discovery_data.fields.t_bir_q == TEL_DVSEC_TBIR_BAR0) { if (cpu_cl_devsc_cap.discovery_data.fields.t_bir_q == TEL_DVSEC_TBIR_BAR0) {
pci_write_config32(SA_DEV_TMT, TEL_CFG_BAR0, tmp_bar_addr); pci_write_config32(SA_DEV_TMT, PCI_BASE_ADDRESS_0, tmp_bar_addr);
} else if (cpu_cl_devsc_cap.discovery_data.fields.t_bir_q == TEL_DVSEC_TBIR_BAR1) { } else if (cpu_cl_devsc_cap.discovery_data.fields.t_bir_q == TEL_DVSEC_TBIR_BAR1) {
pci_write_config32(SA_DEV_TMT, TEL_CFG_BAR1, tmp_bar_addr); pci_write_config32(SA_DEV_TMT, PCI_BASE_ADDRESS_1, tmp_bar_addr);
} else { } else {
printk(BIOS_DEBUG, "invalid discovery data t_bir_q: 0x%x\n", printk(BIOS_DEBUG, "invalid discovery data t_bir_q: 0x%x\n",
cpu_cl_devsc_cap.discovery_data.fields.t_bir_q); cpu_cl_devsc_cap.discovery_data.fields.t_bir_q);