mb/google/dedede/var/sasukette: Update DPTF parameters
Update DPTF parameters from internal thermal team. BUG=b:180875580 BRANCH=dedede TEST=emerge-dedede coreboot Signed-off-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com> Change-Id: Id18a38cddbcacbafbe2c54d94dbda5e00de02b3b Reviewed-on: https://review.coreboot.org/c/coreboot/+/55208 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Evan Green <evgreen@chromium.org>
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@ -74,7 +74,42 @@ chip soc/intel/jasperlake
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.pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
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}" # Camera
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register "power_limits_config" = "{
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.tdp_pl1_override = 7,
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.tdp_pl2_override = 20,
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}"
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register "tcc_offset" = "10" # TCC of 95C
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device domain 0 on
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device pci 04.0 on
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chip drivers/intel/dptf
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## Passive Policy
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 52, 5000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 54, 5000),
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[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 54, 5000),}"
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## Critical Policy
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN),
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[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN),}"
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register "controls.power_limits.pl1" = "{
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.min_power = 5000,
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.max_power = 7000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 28 * MSECS_PER_SEC,
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.granularity = 250,}"
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register "controls.power_limits.pl2" = "{
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.min_power = 20000,
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.max_power = 20000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,}"
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device generic 0 on end
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end
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end # SA Thermal device
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device pci 14.0 on
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chip drivers/usb/acpi
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device usb 0.0 on
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