mediatek/mt8183: support SAMSUNG and MICRON EMCP LPDDR4X DDR bootup
Support SAMSUNG KMDP6001DA-B425 and MICRON MT29VZZZAD8DQKSL EMCP LPDDR4X DDR From the calibration log of MICRON MT29VZZZAD8DQKSL, we found the begin pass range of RX window earlier than with other DDR type. So need change the DQS starting offset to increase the scan range of RX window. BUG=b:80501386 BRANCH=none TEST=Boots correctly on EMCP DRAM Change-Id: I5fcc8673a2fbd7ec3a8776ab61c57f8903ddda20 Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32243 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Huayang Duan <huayang.duan@mediatek.corp-partner.google.com>
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@ -21,6 +21,8 @@
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static const char *const sdram_configs[] = {
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[1] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
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[2] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
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[3] = "sdram-lpddr4x-KMDP6001DA-B425-4GB",
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[5] = "sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB",
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};
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static struct sdram_params params;
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@ -1,6 +1,8 @@
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sdram-params :=
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sdram-params += sdram-lpddr4x-H9HCNNNCPMALHR-4GB
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sdram-params += sdram-lpddr4x-MT53E1G32D4NQ-4GB
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sdram-params += sdram-lpddr4x-KMDP6001DA-B425-4GB
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sdram-params += sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB
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$(foreach params,$(sdram-params), \
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$(eval cbfs-files-y += $(params)) \
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@ -0,0 +1,41 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <soc/emi.h>
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struct sdram_params params = {
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.impedance = {
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[ODT_OFF] = {0x9, 0x7, 0x0, 0xF},
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[ODT_ON] = {0xA, 0x9, 0x0, 0xE}
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},
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.wr_level = {
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[CHANNEL_A] = { {0x21, 0x21}, {0x20, 0x20} },
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[CHANNEL_B] = { {0x1E, 0x1F}, {0x1D, 0x1E} }
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},
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.cbt_cs = {
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[CHANNEL_A] = {0x1, 0x1},
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[CHANNEL_B] = {0x2, 0x2}
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},
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.cbt_mr12 = {
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[CHANNEL_A] = {0x56, 0x56},
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[CHANNEL_B] = {0x58, 0x5C}
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},
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.emi_cona_val = 0xF053F154,
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.emi_conh_val = 0x44440003,
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.emi_conf_val = 0x00421000,
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.chn_emi_cona_val = {0x0444F051, 0x0444F051},
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.cbt_mode_extern = CBT_NORMAL_MODE,
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.delay_cell_unit = 868,
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};
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@ -0,0 +1,41 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <soc/emi.h>
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struct sdram_params params = {
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.impedance = {
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[ODT_OFF] = {0x9, 0x7, 0x0, 0xF},
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[ODT_ON] = {0xA, 0x9, 0x0, 0xE}
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},
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.wr_level = {
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[CHANNEL_A] = { {0x21, 0x21}, {0x20, 0x20} },
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[CHANNEL_B] = { {0x21, 0x28}, {0x21, 0x29} }
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},
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.cbt_cs = {
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[CHANNEL_A] = {0x2, 0x2},
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[CHANNEL_B] = {0x2, 0x2}
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},
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.cbt_mr12 = {
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[CHANNEL_A] = {0x5E, 0x5E},
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[CHANNEL_B] = {0x5E, 0x5C}
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},
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.emi_cona_val = 0xF053F154,
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.emi_conh_val = 0x44440003,
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.emi_conf_val = 0x00421000,
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.chn_emi_cona_val = {0x0444F051, 0x0444F051},
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.cbt_mode_extern = CBT_NORMAL_MODE,
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.delay_cell_unit = 868,
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};
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@ -32,7 +32,7 @@ enum {
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enum {
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FIRST_DQ_DELAY = 0,
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FIRST_DQS_DELAY = -10,
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FIRST_DQS_DELAY = -16,
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MAX_DQDLY_TAPS = 16,
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MAX_RX_DQDLY_TAPS = 63,
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};
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