Documentation: Update index.md and move files
* Add more subdirectories and index.mds. * Move "getting started" and "lessons" into sub-directories. * Move "NativeRaminit" into northbridge/intel/sandybridge folder. * Move "MultiProcessorInit" into soc/intel/icelake folder. * Reference new files Change-Id: I78c3ec0e8bcc342686277ae141a88d0486680978 Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/26262 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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# Getting Started
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* [Build System](build_system.md)
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* [Submodules](submodules.md)
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* [Kconfig](kconfig.md)
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* [Gerrit Guidelines](gerrit_guidelines.md)
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Welcome to coreboot's documentation!
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# Welcome to the coreboot documentation
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====================================
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This is the developer documentation for [coreboot](https://coreboot.org).
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This is the developer documentation for [coreboot](https://coreboot.org).
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It is built from Markdown files in the
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It is built from Markdown files in the
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Contents:
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Contents:
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* [Lesson 2: Submitting a patch to coreboot.org](Lesson2.md)
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* [Getting Started](getting_started/index.md)
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* [Gerrit Etiquette and Guidelines](gerrit_guidelines.md)
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* [Rookie Guide](lessons/index.md)
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* [coreboot's build system](build_system.md)
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* [Kconfig in coreboot](core/Kconfig.md)
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* [Use of git submodules in coreboot](submodules.md)
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* [Timestamps](timestamp.md)
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* [Timestamps](timestamp.md)
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* [Dealing with Untrusted Input in SMM](technotes/2017-02-dealing-with-untrusted-input-in-smm.md)
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* [Dealing with Untrusted Input in SMM](technotes/2017-02-dealing-with-untrusted-input-in-smm.md)
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* [ABI data consumption](abi-data-consumption.md)
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* [ABI data consumption](abi-data-consumption.md)
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* [GPIO toggling in ACPI AML](acpi/gpio.md)
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* [GPIO toggling in ACPI AML](acpi/gpio.md)
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* [Native Graphics Initialization with libgfxinit](gfx/libgfxinit.md)
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* [Native Graphics Initialization with libgfxinit](gfx/libgfxinit.md)
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* [Sandy Bridge Raminit](Intel/NativeRaminit/Sandybridge.md)
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* [Northbridge-specific documentation](northbridge/index.md)
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* [System on Chip-specific documentation](soc/index.md)
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* [Mainboard-specific documentation](mainboard/index.md)
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* [Mainboard-specific documentation](mainboard/index.md)
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* [SuperIO-specific documentation](superio/index.md)
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* [SuperIO-specific documentation](superio/index.md)
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# Rookie Guide
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* [Lesson 1: Starting from scratch](lesson1.md)
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* [Lesson 2: Submitting a patch to coreboot.org](lesson2.md)
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## Technology
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## Technology
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```eval_rst
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```eval_rst
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+------------------+--------------------------------------+
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+------------------+--------------------------------------------------+
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| Northbridge | Sandy Bridge |
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| Northbridge | :doc:`../../northbridge/intel/sandybridge/index` |
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+------------------+--------------------------------------+
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+------------------+--------------------------------------------------+
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| Southbridge | bd82x6x |
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| Southbridge | bd82x6x |
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+------------------+--------------------------------------+
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+------------------+--------------------------------------------------+
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| CPU | model_206ax |
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| CPU | model_206ax |
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+------------------+--------------------------------------+
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+------------------+--------------------------------------------------+
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| SuperIO | :doc:`../../superio/nuvoton/npcd378` |
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| SuperIO | :doc:`../../superio/nuvoton/npcd378` |
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+------------------+--------------------------------------+
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+------------------+--------------------------------------------------+
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| EC | |
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| EC | |
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+------------------+--------------------------------------+
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+------------------+--------------------------------------------------+
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| Coprocessor | Intel ME |
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| Coprocessor | Intel ME |
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+------------------+--------------------------------------+
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+------------------+--------------------------------------------------+
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```
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```
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[Compaq 8200 Elite SFF]: https://support.hp.com/us-en/document/c03414707
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[Compaq 8200 Elite SFF]: https://support.hp.com/us-en/document/c03414707
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# Northbridge-specific documentation
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This section contains documentation about coreboot on specific northbridges.
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## Vendor
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- [Intel](intel/index.md)
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# Intel Northbridge-specific documentation
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This section contains documentation about coreboot on specific Intel Northbridges.
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## Platforms
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- [Sandy Bridge](sandybridge/index.md)
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# Intel Sandy Bridge-specific documentation
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This section contains documentation about coreboot on specific Intel "Sandy Bridge" northbridge.
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## Topics
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- [Native Ram Initialization](nri.md)
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```
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```
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## (Inoffical) register documentation
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## (Inoffical) register documentation
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- [Sandy Bride - Register documentation](SandyBridge_registers.md)
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- [Sandy Bride - Register documentation](nri_registers.md)
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## Frequency selection
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## Frequency selection
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- [Sandy Bride - Frequency selection](Sandybridge_freq.md)
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- [Sandy Bride - Frequency selection](nri_freq.md)
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## Read training
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## Read training
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- [Sandy Bride - Read training](Sandybridge_read.md)
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- [Sandy Bride - Read training](nri_read.md)
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### SMBIOS type 17
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### SMBIOS type 17
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The SMBIOS specification allows to report the memory configuration in use.
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The SMBIOS specification allows to report the memory configuration in use.
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# SOC-specific documentation
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This section contains documentation about coreboot on specific SOCs.
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## Vendor
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- [Intel](intel/index.md)
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# Intel Ice Lake SOC-specific documentation
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This section contains documentation about coreboot on specific Intel "Ice Lake" SOCs.
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## Multiprocessor Init
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- [Multiprocessor Init](MultiProcessorInit.md)
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# Intel SOC-specific documentation
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This section contains documentation about coreboot on specific Intel SOCs.
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## Platforms
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- [Ice Lake/9th Gen Core-i series](icelake/index.md)
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