Documentation: Update index.md and move files

* Add more subdirectories and index.mds.
* Move "getting started" and "lessons" into sub-directories.
* Move "NativeRaminit" into northbridge/intel/sandybridge folder.
* Move "MultiProcessorInit" into soc/intel/icelake folder.
* Reference new files

Change-Id: I78c3ec0e8bcc342686277ae141a88d0486680978
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/26262
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

Documentation/getting_started/index.md

@@ -0,0 +1,6 @@
+# Getting Started
+
+* [Build System](build_system.md)
+* [Submodules](submodules.md)
+* [Kconfig](kconfig.md)
+* [Gerrit Guidelines](gerrit_guidelines.md)

Documentation/index.md

@@ -1,5 +1,4 @@
-Welcome to coreboot's documentation!
-====================================
+# Welcome to the coreboot documentation
 
 This is the developer documentation for [coreboot](https://coreboot.org).
 It is built from Markdown files in the
@@ -8,16 +7,14 @@ directory in the source code.
 
 Contents:
 
-* [Lesson 2: Submitting a patch to coreboot.org](Lesson2.md)
-* [Gerrit Etiquette and Guidelines](gerrit_guidelines.md)
-* [coreboot's build system](build_system.md)
-* [Kconfig in coreboot](core/Kconfig.md)
-* [Use of git submodules in coreboot](submodules.md)
+* [Getting Started](getting_started/index.md)
+* [Rookie Guide](lessons/index.md)
 * [Timestamps](timestamp.md)
 * [Dealing with Untrusted Input in SMM](technotes/2017-02-dealing-with-untrusted-input-in-smm.md)
 * [ABI data consumption](abi-data-consumption.md)
 * [GPIO toggling in ACPI AML](acpi/gpio.md)
 * [Native Graphics Initialization with libgfxinit](gfx/libgfxinit.md)
-* [Sandy Bridge Raminit](Intel/NativeRaminit/Sandybridge.md)
+* [Northbridge-specific documentation](northbridge/index.md)
+* [System on Chip-specific documentation](soc/index.md)
 * [Mainboard-specific documentation](mainboard/index.md)
 * [SuperIO-specific documentation](superio/index.md)

Documentation/lessons/index.md

@@ -0,0 +1,4 @@
+# Rookie Guide
+
+* [Lesson 1: Starting from scratch](lesson1.md)
+* [Lesson 2: Submitting a patch to coreboot.org](lesson2.md)

Documentation/mainboard/hp/compaq_8200_sff.md

@@ -60,19 +60,19 @@ as otherwise there's not enough space near the flash.
 ## Technology
 
 ```eval_rst
-+------------------+--------------------------------------+
-| Northbridge      | Sandy Bridge                         |
-+------------------+--------------------------------------+
++------------------+--------------------------------------------------+
+| Northbridge      | :doc:`../../northbridge/intel/sandybridge/index` |
++------------------+--------------------------------------------------+
 | Southbridge      | bd82x6x                                          |
-+------------------+--------------------------------------+
++------------------+--------------------------------------------------+
 | CPU              | model_206ax                                      |
-+------------------+--------------------------------------+
++------------------+--------------------------------------------------+
 | SuperIO          | :doc:`../../superio/nuvoton/npcd378`             |
-+------------------+--------------------------------------+
++------------------+--------------------------------------------------+
 | EC               |                                                  |
-+------------------+--------------------------------------+
++------------------+--------------------------------------------------+
 | Coprocessor      | Intel ME                                         |
-+------------------+--------------------------------------+
++------------------+--------------------------------------------------+
 ```
 
 [Compaq 8200 Elite SFF]: https://support.hp.com/us-en/document/c03414707

Documentation/northbridge/index.md

@@ -0,0 +1,7 @@
+# Northbridge-specific documentation
+
+This section contains documentation about coreboot on specific northbridges.
+
+## Vendor
+
+- [Intel](intel/index.md)

Documentation/northbridge/intel/index.md

@@ -0,0 +1,7 @@
+# Intel Northbridge-specific documentation
+
+This section contains documentation about coreboot on specific Intel Northbridges.
+
+## Platforms
+
+- [Sandy Bridge](sandybridge/index.md)

Documentation/northbridge/intel/sandybridge/index.md

@@ -0,0 +1,7 @@
+# Intel Sandy Bridge-specific documentation
+
+This section contains documentation about coreboot on specific Intel "Sandy Bridge" northbridge.
+
+## Topics
+
+- [Native Ram Initialization](nri.md)

Documentation/northbridge/intel/sandybridge/nri.md

@@ -41,13 +41,13 @@ The memory initialization code has to take care of lots of duties:
 ```
 
 ## (Inoffical) register documentation
-- [Sandy Bride - Register documentation](SandyBridge_registers.md)
+- [Sandy Bride - Register documentation](nri_registers.md)
 
 ## Frequency selection
-- [Sandy Bride - Frequency selection](Sandybridge_freq.md)
+- [Sandy Bride - Frequency selection](nri_freq.md)
 
 ## Read training
-- [Sandy Bride - Read training](Sandybridge_read.md)
+- [Sandy Bride - Read training](nri_read.md)
 
 ### SMBIOS type 17
 The SMBIOS specification allows to report the memory configuration in use.

Documentation/soc/index.md

@@ -0,0 +1,7 @@
+# SOC-specific documentation
+
+This section contains documentation about coreboot on specific SOCs.
+
+## Vendor
+
+- [Intel](intel/index.md)

Documentation/soc/intel/icelake/index.md

@@ -0,0 +1,7 @@
+# Intel Ice Lake SOC-specific documentation
+
+This section contains documentation about coreboot on specific Intel "Ice Lake" SOCs.
+
+## Multiprocessor Init
+
+- [Multiprocessor Init](MultiProcessorInit.md)

Documentation/soc/intel/index.md

@@ -0,0 +1,7 @@
+# Intel SOC-specific documentation
+
+This section contains documentation about coreboot on specific Intel SOCs.
+
+## Platforms
+
+- [Ice Lake/9th Gen Core-i series](icelake/index.md)