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soc/amd/cezanne: Correct S0i3 verstage softfuse bit 

PSP_S0I3_RESUME_VERSTAGE softfuse bit is 58, not 40.

BUG=b:202397678
BRANCH=None
TEST=Boot guybrush, ensure S0i3 verstage runs with latest PSP.

Change-Id: Ia27f6e48e345aac0d5f6579d663a6b655688239a
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60214
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Rob Barnes 2021-12-17 10:37:43 -07:00 committed by Felix Held
parent 57af68fec9
commit 4454c9af3c
1 changed files with 1 additions and 1 deletions
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src/soc/amd/cezanne/Makefile.inc
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@ -111,7 +111,7 @@ PSP_SOFTFUSE_BITS += 29
endif
ifeq ($(CONFIG_PSP_S0I3_RESUME_VERSTAGE),y)
PSP_SOFTFUSE_BITS += 40
PSP_SOFTFUSE_BITS += 58
endif
# Use additional Soft Fuse bits specified in Kconfig