soc/amd/picasso: Delete partially implemented usb implementation
There is now a generic xhci driver we can use to generate the xHCI ACPI nodes. BUG=b:154756391 TEST=Boot trembyle and look at ACPI table Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I3e9973dd416ccd51971f4d9410bed991eb7c3c41 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41901 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -69,7 +69,6 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
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ramstage-y += uart.c
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ramstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
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ramstage-y += usb.c
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ramstage-y += tsc_freq.c
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ramstage-y += finalize.c
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ramstage-y += soc_util.c
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@ -27,8 +27,6 @@ Device(SBUS) {
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Name(_ADR, 0x00140000)
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} /* end SBUS */
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#include "usb.asl"
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/* 0:14.2 - I2S Audio */
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/* 0:14.3 - LPC */
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@ -1,53 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* 0:12.0 - EHCI */
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Device(EHC0) {
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Name(_ADR, 0x00120000)
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Name(_PRW, Package() { 0xb, 3 })
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Device (RHUB) {
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Name (_ADR, Zero)
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Device (HS01) { Name (_ADR, 1) }
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Device (HS02) { Name (_ADR, 2) }
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Device (HS03) { Name (_ADR, 3) }
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Device (HS04) { Name (_ADR, 4) }
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Device (HS05) { Name (_ADR, 5) }
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Device (HS06) { Name (_ADR, 6) }
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Device (HS07) { Name (_ADR, 7) }
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Device (HS08) { Name (_ADR, 8) }
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}
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Method(_S0W,0) {
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Return(0)
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}
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Method(_S3W,0) {
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Return(4)
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}
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Method(_S4W,0) {
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Return(4)
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}
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} /* end EHC0 */
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/* 0:10.0 - XHCI 0*/
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Device(XHC0) {
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Name(_ADR, 0x00100000)
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Name(_PRW, Package() { 0xb, 3 })
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Device (SS01) { Name (_ADR, 1) }
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Device (SS02) { Name (_ADR, 2) }
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Device (SS03) { Name (_ADR, 3) }
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Method(_S0W,0) {
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Return(0)
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}
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Method(_S3W,0) {
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Return(4)
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}
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Method(_S4W,0) {
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Return(4)
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}
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} /* end XHC0 */
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@ -30,23 +30,6 @@ const char *soc_acpi_name(const struct device *dev)
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if (dev->path.type == DEVICE_PATH_DOMAIN)
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return "PCI0";
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if (dev->path.type == DEVICE_PATH_USB) {
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switch (dev->path.usb.port_type) {
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case 0:
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/* Root Hub */
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return "RHUB";
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case 3:
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/* USB3 ports */
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switch (dev->path.usb.port_id) {
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case 0: return "SS01";
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case 1: return "SS02";
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case 2: return "SS03";
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}
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break;
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}
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return NULL;
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}
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if (dev->path.type != DEVICE_PATH_PCI)
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return NULL;
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@ -67,20 +50,6 @@ const char *soc_acpi_name(const struct device *dev)
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}
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}
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if (dev->bus->dev->path.type == DEVICE_PATH_PCI
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&& dev->bus->dev->path.pci.devfn == PCIE_GPP_A_DEVFN) {
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switch (dev->path.pci.devfn) {
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case XHCI0_DEVFN:
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return "XHC0";
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case XHCI1_DEVFN:
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return "XHC1";
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default:
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printk(BIOS_WARNING, "Unknown Bus A PCI device: dev: %d, fn: %d\n",
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PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
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return NULL;
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}
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}
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printk(BIOS_WARNING, "Unknown PCI device: dev: %d, fn: %d\n",
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PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
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return NULL;
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@ -1,42 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <device/pci_ehci.h>
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#include <soc/acpi.h>
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#include <soc/pci_devs.h>
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#include <soc/southbridge.h>
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#include <amdblocks/acpimmio.h>
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static void picasso_usb_init(struct device *dev)
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{
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/* USB overcurrent configuration is programmed inside the FSP */
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printk(BIOS_DEBUG, "%s\n", __func__);
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}
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static struct device_operations usb_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = picasso_usb_init,
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.scan_bus = scan_static_bus,
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.acpi_name = soc_acpi_name,
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.ops_pci = &pci_dev_ops_pci,
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};
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static const unsigned short pci_device_ids[] = {
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PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_XHCI0,
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PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_XHCI1,
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PCI_DEVICE_ID_AMD_FAM17H_MODEL20H_XHCI0,
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0
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};
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static const struct pci_driver usb_0_driver __pci_driver = {
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.ops = &usb_ops,
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.vendor = PCI_VENDOR_ID_AMD,
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.devices = pci_device_ids,
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};
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