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soc/mediatek/mt8173: Correct multi-line comment format 

Make the format of two multi-line comments compliant with the coding
style.

Change-Id: I8bc7b1eb175957b76ca19acdcb29b06ae86429b4
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/22279
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Paul Menzel 2017-10-24 15:38:51 +02:00 committed by Nico Huber
parent 545593d62c
commit 454cfa00b9
2 changed files with 5 additions and 2 deletions
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3
src/soc/mediatek/mt8173/memory.c
View File

@ -343,7 +343,8 @@ void mt_mem_init(const struct mt8173_sdram_params *sdram_params)
mt_set_emi(sdram_params); mt_set_emi(sdram_params);
if (IS_ENABLED(CONFIG_MEMORY_TEST)) { if (IS_ENABLED(CONFIG_MEMORY_TEST)) {
/* do memory test: /*
* do memory test:
* set memory scan range 0x2000 * set memory scan range 0x2000
* larger test length, longer system boot up time * larger test length, longer system boot up time
*/ */

4
src/soc/mediatek/mt8173/mt6391.c
View File

@ -415,7 +415,9 @@ static void mt6391_default_buck_voltage(void)
{ {
u16 reg_val = 0; u16 reg_val = 0;
u16 buck_val = 0; u16 buck_val = 0;
/* There are two kinds of PMIC used for MT8173 : MT6397s/MT6391. /*
* There are two kinds of PMIC used for MT8173 : MT6397s/MT6391.
*
* MT6397s: the default voltage of register was not suitable for * MT6397s: the default voltage of register was not suitable for
* MT8173, needs to apply the setting of eFuse. * MT8173, needs to apply the setting of eFuse.
* VPCA15/VSRMCA15/: 1.15V * VPCA15/VSRMCA15/: 1.15V