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mb/google/kukui: revise per-device memory mapping table 

In order to help identifying right DRAM info (especially in user space),
we want to unify the mapping table and do the device-specific mapping by
a virtual offset based on build config.

BUG=b:161768221,b:159301679
BRANCH=kukui
TEST=emerge-jacuzzi coreboot

Change-Id: If89bf18c48d263deb79df3e7a60c33bec000d8a3
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43987
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Hung-Te Lin 2020-07-28 10:59:00 +08:00
parent a4cad368a2
commit 45701fd96e
4 changed files with 49 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/mainboard/google/kukui/Kconfig
View File

@ -71,4 +71,9 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS
hex
default 0x2
config BOARD_SDRAM_TABLE_OFFSET
hex
default 0x10 if BOARD_GOOGLE_BURNET || BOARD_GOOGLE_ESCHE
default 0x0
endif

5
src/mainboard/google/kukui/boardid.c
View File

@ -110,7 +110,10 @@ uint32_t ram_code(void)
{
static uint32_t cached_ram_code = BOARD_ID_INIT;
if (cached_ram_code == BOARD_ID_INIT)
if (cached_ram_code == BOARD_ID_INIT) {
cached_ram_code = get_adc_index(RAM_ID_CHANNEL);
/* Model-specific offset - see sdram_configs.c for details. */
cached_ram_code += CONFIG_BOARD_SDRAM_TABLE_OFFSET;
}
return cached_ram_code;
}

51
src/mainboard/google/kukui/sdram_configs.c
View File

@ -5,24 +5,29 @@
#include <console/console.h>
#include <soc/emi.h>
/*
* The RAM_CODE ADC on Kukui can support only 12 different levels. Each model
* can create its own mapping if needed, with an offset (0x10, 0x20, ...,
* defined as CONFIG_BOARD_SDRAM_TABLE_OFFSET) applied in ram_code().
*/
static const char *const sdram_configs[] = {
#if CONFIG(BOARD_GOOGLE_BURNET)
[1] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
[2] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
[3] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
[4] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
#else /* The default unified table */
[1] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
[2] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
[3] = "sdram-lpddr4x-KMDH6001DA-B422-4GB",
[4] = "sdram-lpddr4x-KMDP6001DA-B425-4GB",
[5] = "sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB",
[6] = "sdram-lpddr4x-KMDV6001DA-B620-4GB",
[7] = "sdram-lpddr4x-SDADA4CR-128G-4GB",
[8] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
[9] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
[10] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
#endif
/* Standard table. */
[0x01] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
[0x02] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
[0x03] = "sdram-lpddr4x-KMDH6001DA-B422-4GB",
[0x04] = "sdram-lpddr4x-KMDP6001DA-B425-4GB",
[0x05] = "sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB",
[0x06] = "sdram-lpddr4x-KMDV6001DA-B620-4GB",
[0x07] = "sdram-lpddr4x-SDADA4CR-128G-4GB",
[0x08] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
[0x09] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
[0x0a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
/* Table shared by Burnet and its variants, offset = 0x10 */
[0x11] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
[0x12] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
[0x13] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
[0x14] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
};
static struct sdram_params params;
@ -30,11 +35,15 @@ static struct sdram_params params;
const struct sdram_params *get_sdram_config(void)
{
uint32_t ramcode = ram_code();
const char *name = NULL;
if (ramcode >= ARRAY_SIZE(sdram_configs) ||
cbfs_boot_load_file(sdram_configs[ramcode], &params, sizeof(params),
CBFS_TYPE_STRUCT) != sizeof(params))
die("Cannot load SDRAM parameter file!");
if (ramcode < ARRAY_SIZE(sdram_configs))
name = sdram_configs[ramcode];
if (!name || cbfs_boot_load_file(name, &params, sizeof(params),
CBFS_TYPE_STRUCT) != sizeof(params))
die("Cannot load SDRAM parameter file for RAM code %#02x: %s!",
ramcode, name ? name : "unknown");
return &params;
}

27
src/mainboard/google/kukui/sdram_params/Makefile.inc
View File

@ -1,21 +1,14 @@
sdram-params :=
ifeq ($(CONFIG_BOARD_GOOGLE_BURNET),y)
sdram-params += sdram-lpddr4x-H9HCNNNCPMALHR-4GB
sdram-params += sdram-lpddr4x-MT53E1G32D4NQ-4GB
sdram-params += sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB
sdram-params += sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB
else
sdram-params += sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB
sdram-params += sdram-lpddr4x-H9HCNNNCPMALHR-4GB
sdram-params += sdram-lpddr4x-MT53E1G32D4NQ-4GB
sdram-params += sdram-lpddr4x-KMDH6001DA-B422-4GB
sdram-params += sdram-lpddr4x-KMDP6001DA-B425-4GB
sdram-params += sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB
sdram-params += sdram-lpddr4x-KMDV6001DA-B620-4GB
sdram-params += sdram-lpddr4x-SDADA4CR-128G-4GB
sdram-params += sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB
sdram-params += sdram-lpddr4x-MT53E2G32D4NQ-046-8GB
endif
sdram-params += sdram-lpddr4x-H9HCNNNCPMALHR-4GB
sdram-params += sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB
sdram-params += sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB
sdram-params += sdram-lpddr4x-KMDH6001DA-B422-4GB
sdram-params += sdram-lpddr4x-KMDP6001DA-B425-4GB
sdram-params += sdram-lpddr4x-KMDV6001DA-B620-4GB
sdram-params += sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB
sdram-params += sdram-lpddr4x-MT53E1G32D4NQ-4GB
sdram-params += sdram-lpddr4x-MT53E2G32D4NQ-046-8GB
sdram-params += sdram-lpddr4x-SDADA4CR-128G-4GB
$(foreach params,$(sdram-params), \
$(eval cbfs-files-y += $(params)) \