soc/intel/common/lpss_i2c: simplify API and use common config structure
The apollolake and skylake had duplicate stanzas of code for initializing the i2c buses. Additionally, they also had very similar structures for providing settings for the i2c speed control. Introduce a new struct lpss_i2c_bus_config and utilize it in both apollolake and skylake thereby removing the need for SoC-specific structres. The new structure is used for initializing a bus fully as the lpss i2c API is simplified in that lpss_i2c_init() is only required to be called. The struct lpss_i2c_bus_config structure is passed in for both initializing and filling in the SSDT information. The formerly exposed functions are made static to reduce the external API exposure. BUG=chrome-os-partner:58889 Change-Id: Ib4fa8a7a4de052da75c778a7658741a5a8e0e6b9 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/17348 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
parent
ed14a4e0df
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4668ba77ea
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@ -28,15 +28,6 @@
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#define CLKREQ_DISABLED 0xf
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#define CLKREQ_DISABLED 0xf
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#define APOLLOLAKE_I2C_DEV_MAX 8
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#define APOLLOLAKE_I2C_DEV_MAX 8
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struct apollolake_i2c_config {
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/* Bus should be enabled prior to ramstage with temporary base */
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int early_init;
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/* Bus speed in Hz, default is I2C_SPEED_FAST (400 KHz) */
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enum i2c_speed speed;
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/* Specific bus speed configuration */
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struct lpss_i2c_speed_config speed_config[LPSS_I2C_SPEED_CONFIG_COUNT];
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};
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/* Serial IRQ control. SERIRQ_QUIET is the default (0). */
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/* Serial IRQ control. SERIRQ_QUIET is the default (0). */
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enum serirq_mode {
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enum serirq_mode {
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SERIRQ_QUIET,
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SERIRQ_QUIET,
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@ -95,7 +86,7 @@ struct soc_intel_apollolake_config {
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enum serirq_mode serirq_mode;
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enum serirq_mode serirq_mode;
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/* I2C bus configuration */
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/* I2C bus configuration */
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struct apollolake_i2c_config i2c[APOLLOLAKE_I2C_DEV_MAX];
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struct lpss_i2c_bus_config i2c[APOLLOLAKE_I2C_DEV_MAX];
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uint8_t gpe0_dw1; /* GPE0_63_32 STS/EN */
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uint8_t gpe0_dw1; /* GPE0_63_32 STS/EN */
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uint8_t gpe0_dw2; /* GPE0_95_64 STS/EN */
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uint8_t gpe0_dw2; /* GPE0_95_64 STS/EN */
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@ -60,24 +60,12 @@ static int i2c_dev_to_bus(struct device *dev)
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static void i2c_dev_init(struct device *dev)
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static void i2c_dev_init(struct device *dev)
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{
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{
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struct soc_intel_apollolake_config *config = dev->chip_info;
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struct soc_intel_apollolake_config *config = dev->chip_info;
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const struct lpss_i2c_speed_config *sptr;
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int bus = i2c_dev_to_bus(dev);
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enum i2c_speed speed;
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int i, bus = i2c_dev_to_bus(dev);
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if (!config || bus < 0)
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if (!config || bus < 0)
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return;
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return;
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speed = config->i2c[bus].speed ? : I2C_SPEED_FAST;
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lpss_i2c_init(bus, &config->i2c[bus]);
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lpss_i2c_init(bus, speed);
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/* Apply custom speed config if it has been set by the board */
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for (i = 0; i < LPSS_I2C_SPEED_CONFIG_COUNT; i++) {
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sptr = &config->i2c[bus].speed_config[i];
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if (sptr->speed == speed) {
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lpss_i2c_set_speed_config(bus, sptr);
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break;
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}
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}
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}
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}
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static void i2c_fill_ssdt(struct device *dev)
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static void i2c_fill_ssdt(struct device *dev)
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@ -89,7 +77,7 @@ static void i2c_fill_ssdt(struct device *dev)
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return;
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return;
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acpigen_write_scope(acpi_device_path(dev));
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acpigen_write_scope(acpi_device_path(dev));
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lpss_i2c_acpi_fill_ssdt(config->i2c[bus].speed_config);
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lpss_i2c_acpi_fill_ssdt(&config->i2c[bus]);
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acpigen_pop_len();
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acpigen_pop_len();
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}
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}
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@ -29,8 +29,6 @@ static int i2c_early_init_bus(unsigned bus)
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{
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{
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ROMSTAGE_CONST struct soc_intel_apollolake_config *config;
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ROMSTAGE_CONST struct soc_intel_apollolake_config *config;
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ROMSTAGE_CONST struct device *tree_dev;
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ROMSTAGE_CONST struct device *tree_dev;
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const struct lpss_i2c_speed_config *sptr;
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enum i2c_speed speed;
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pci_devfn_t dev;
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pci_devfn_t dev;
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int devfn;
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int devfn;
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uintptr_t base;
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uintptr_t base;
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@ -72,21 +70,11 @@ static int i2c_early_init_bus(unsigned bus)
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write32(reg, value);
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write32(reg, value);
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/* Initialize the controller */
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/* Initialize the controller */
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speed = config->i2c[bus].speed ? : I2C_SPEED_FAST;
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if (lpss_i2c_init(bus, &config->i2c[bus]) < 0) {
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if (lpss_i2c_init(bus, speed) < 0) {
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printk(BIOS_ERR, "I2C%u failed to initialize\n", bus);
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printk(BIOS_ERR, "I2C%u failed to initialize\n", bus);
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return -1;
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return -1;
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}
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}
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/* Apply custom speed config if it has been set by the board */
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for (value = 0; value < LPSS_I2C_SPEED_CONFIG_COUNT; value++) {
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sptr = &config->i2c[bus].speed_config[value];
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if (sptr->speed == speed) {
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lpss_i2c_set_speed_config(bus, sptr);
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break;
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}
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}
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return 0;
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return 0;
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}
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}
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@ -370,39 +370,8 @@ static void lpss_i2c_acpi_write_speed_config(
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acpigen_pop_len();
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acpigen_pop_len();
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}
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}
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void lpss_i2c_acpi_fill_ssdt(const struct lpss_i2c_speed_config *override)
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static int lpss_i2c_set_speed_config(unsigned bus,
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{
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const struct lpss_i2c_speed_config *config)
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const struct lpss_i2c_speed_config *sptr;
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struct lpss_i2c_speed_config sgen;
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enum i2c_speed speeds[LPSS_I2C_SPEED_CONFIG_COUNT] = {
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I2C_SPEED_STANDARD,
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I2C_SPEED_FAST,
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I2C_SPEED_FAST_PLUS,
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I2C_SPEED_HIGH,
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};
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int i;
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/* Report timing values for the OS driver */
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for (i = 0; i < LPSS_I2C_SPEED_CONFIG_COUNT; i++) {
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/* Generate speed config for default case */
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if (lpss_i2c_gen_speed_config(speeds[i], &sgen) < 0)
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continue;
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/* Apply board specific override for this speed if found */
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for (sptr = override; sptr && sptr->speed; sptr++) {
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if (sptr->speed == speeds[i]) {
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memcpy(&sgen, sptr, sizeof(sgen));
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break;
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}
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}
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/* Generate ACPI based on selected speed config */
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lpss_i2c_acpi_write_speed_config(&sgen);
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}
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}
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int lpss_i2c_set_speed_config(unsigned bus,
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const struct lpss_i2c_speed_config *config)
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{
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{
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struct lpss_i2c_regs *regs;
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struct lpss_i2c_regs *regs;
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void *hcnt_reg, *lcnt_reg;
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void *hcnt_reg, *lcnt_reg;
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@ -442,16 +411,26 @@ int lpss_i2c_set_speed_config(unsigned bus,
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return 0;
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return 0;
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}
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}
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int lpss_i2c_gen_speed_config(enum i2c_speed speed,
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static int lpss_i2c_gen_speed_config(enum i2c_speed speed,
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struct lpss_i2c_speed_config *config)
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const struct lpss_i2c_bus_config *bcfg,
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struct lpss_i2c_speed_config *config)
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{
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{
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const int ic_clk = CONFIG_SOC_INTEL_COMMON_LPSS_I2C_CLOCK_MHZ;
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const int ic_clk = CONFIG_SOC_INTEL_COMMON_LPSS_I2C_CLOCK_MHZ;
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uint16_t hcnt_min, lcnt_min;
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uint16_t hcnt_min, lcnt_min;
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int i;
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/* Clock must be provided by Kconfig */
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/* Clock must be provided by Kconfig */
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if (!ic_clk || !config)
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if (!ic_clk)
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return -1;
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return -1;
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/* Apply board specific override for this speed if found */
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for (i = 0; i < LPSS_I2C_SPEED_CONFIG_COUNT; i++) {
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if (bcfg->speed_config[i].speed != speed)
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continue;
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memcpy(config, &bcfg->speed_config[i], sizeof(*config));
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return 0;
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}
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if (speed >= I2C_SPEED_HIGH) {
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if (speed >= I2C_SPEED_HIGH) {
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/* High speed */
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/* High speed */
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hcnt_min = MIN_HS_SCL_HIGHTIME;
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hcnt_min = MIN_HS_SCL_HIGHTIME;
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return 0;
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return 0;
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}
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}
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int lpss_i2c_set_speed(unsigned bus, enum i2c_speed speed)
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static int lpss_i2c_set_speed(unsigned bus, enum i2c_speed speed,
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const struct lpss_i2c_bus_config *bcfg)
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{
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{
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struct lpss_i2c_regs *regs;
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struct lpss_i2c_regs *regs;
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struct lpss_i2c_speed_config config;
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struct lpss_i2c_speed_config config;
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@ -504,7 +484,7 @@ int lpss_i2c_set_speed(unsigned bus, enum i2c_speed speed)
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}
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}
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/* Generate speed config based on clock */
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/* Generate speed config based on clock */
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if (lpss_i2c_gen_speed_config(speed, &config) < 0)
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if (lpss_i2c_gen_speed_config(speed, bcfg, &config) < 0)
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return -1;
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return -1;
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/* Select this speed in the control register */
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/* Select this speed in the control register */
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return 0;
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return 0;
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}
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}
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int lpss_i2c_init(unsigned bus, enum i2c_speed speed)
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void lpss_i2c_acpi_fill_ssdt(const struct lpss_i2c_bus_config *bcfg)
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{
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struct lpss_i2c_speed_config sgen;
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enum i2c_speed speeds[LPSS_I2C_SPEED_CONFIG_COUNT] = {
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I2C_SPEED_STANDARD,
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I2C_SPEED_FAST,
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I2C_SPEED_FAST_PLUS,
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I2C_SPEED_HIGH,
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};
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int i;
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if (!bcfg)
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return;
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/* Report timing values for the OS driver */
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for (i = 0; i < LPSS_I2C_SPEED_CONFIG_COUNT; i++) {
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/* Generate speed config. */
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if (lpss_i2c_gen_speed_config(speeds[i], bcfg, &sgen) < 0)
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continue;
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/* Generate ACPI based on selected speed config */
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lpss_i2c_acpi_write_speed_config(&sgen);
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}
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}
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int lpss_i2c_init(unsigned bus, const struct lpss_i2c_bus_config *bcfg)
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{
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{
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struct lpss_i2c_regs *regs;
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struct lpss_i2c_regs *regs;
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enum i2c_speed speed;
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if (!bcfg)
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return -1;
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speed = bcfg->speed ? : I2C_SPEED_FAST;
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regs = (struct lpss_i2c_regs *)lpss_i2c_base_address(bus);
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regs = (struct lpss_i2c_regs *)lpss_i2c_base_address(bus);
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if (!regs) {
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if (!regs) {
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@ -536,7 +547,7 @@ int lpss_i2c_init(unsigned bus, enum i2c_speed speed)
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CONTROL_RESTART_ENABLE);
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CONTROL_RESTART_ENABLE);
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/* Set bus speed to FAST by default */
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/* Set bus speed to FAST by default */
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if (lpss_i2c_set_speed(bus, speed ? : I2C_SPEED_FAST) < 0) {
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if (lpss_i2c_set_speed(bus, speed, bcfg) < 0) {
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printk(BIOS_ERR, "I2C failed to set speed for bus %u\n", bus);
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printk(BIOS_ERR, "I2C failed to set speed for bus %u\n", bus);
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return -1;
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return -1;
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}
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}
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write32(®s->intr_mask, INTR_STAT_STOP_DET);
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write32(®s->intr_mask, INTR_STAT_STOP_DET);
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printk(BIOS_INFO, "LPSS I2C bus %u at 0x%p (%u KHz)\n",
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printk(BIOS_INFO, "LPSS I2C bus %u at 0x%p (%u KHz)\n",
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bus, regs, (speed ? : I2C_SPEED_FAST) / KHz);
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bus, regs, speed / KHz);
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return 0;
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return 0;
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}
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}
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*/
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*/
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#define LPSS_I2C_SPEED_CONFIG_COUNT 4
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#define LPSS_I2C_SPEED_CONFIG_COUNT 4
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struct lpss_i2c_bus_config {
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/* Bus should be enabled prior to ramstage with temporary base */
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int early_init;
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/* Bus speed in Hz, default is I2C_SPEED_FAST (400 KHz) */
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enum i2c_speed speed;
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/* Specific bus speed configuration */
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struct lpss_i2c_speed_config speed_config[LPSS_I2C_SPEED_CONFIG_COUNT];
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};
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#define LPSS_I2C_SPEED_CONFIG(speedval,lcnt,hcnt,hold) \
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#define LPSS_I2C_SPEED_CONFIG(speedval,lcnt,hcnt,hold) \
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{ \
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{ \
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.speed = I2C_SPEED_ ## speedval, \
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.speed = I2C_SPEED_ ## speedval, \
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*/
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*/
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uintptr_t lpss_i2c_base_address(unsigned bus);
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uintptr_t lpss_i2c_base_address(unsigned bus);
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/*
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* Generate speed configuration for requested controller and bus speed.
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*
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* This allows a SOC or board to automatically generate speed config to use
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* in firmware and provide to the OS.
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*/
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int lpss_i2c_gen_speed_config(enum i2c_speed speed,
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struct lpss_i2c_speed_config *config);
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/*
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* Set raw speed configuration for given speed type.
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*
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* This allows a SOC or board to override the automatic bus speed calculation
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* and provided specific values for the driver to use.
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*/
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int lpss_i2c_set_speed_config(unsigned bus,
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const struct lpss_i2c_speed_config *config);
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/*
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/*
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* Generate I2C timing information into the SSDT for the OS driver to consume,
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* Generate I2C timing information into the SSDT for the OS driver to consume,
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* optionally applying override values provided by the caller.
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* optionally applying override values provided by the caller.
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*/
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*/
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void lpss_i2c_acpi_fill_ssdt(const struct lpss_i2c_speed_config *override);
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void lpss_i2c_acpi_fill_ssdt(const struct lpss_i2c_bus_config *bcfg);
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/*
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* Set I2C bus speed for this controller.
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*
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* This allows an SOC or board to set the basic I2C bus speed. Values for the
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* controller configuration registers will be calculated, for more specific
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* control the raw configuration can be provided to lpss_i2c_set_speed_config().
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*/
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int lpss_i2c_set_speed(unsigned bus, enum i2c_speed speed);
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/*
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/*
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* Initialize this bus controller and set the speed.
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* Initialize this bus controller and set the speed.
|
||||||
|
@ -108,6 +90,6 @@ int lpss_i2c_set_speed(unsigned bus, enum i2c_speed speed);
|
||||||
* The SOC *must* define CONFIG_SOC_INTEL_COMMON_LPSS_I2C_CLOCK for the
|
* The SOC *must* define CONFIG_SOC_INTEL_COMMON_LPSS_I2C_CLOCK for the
|
||||||
* bus speed calculation to be correct.
|
* bus speed calculation to be correct.
|
||||||
*/
|
*/
|
||||||
int lpss_i2c_init(unsigned bus, enum i2c_speed speed);
|
int lpss_i2c_init(unsigned bus, const struct lpss_i2c_bus_config *bcfg);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -46,8 +46,6 @@ static void i2c_early_init_bus(unsigned bus)
|
||||||
{
|
{
|
||||||
ROMSTAGE_CONST struct soc_intel_skylake_config *config;
|
ROMSTAGE_CONST struct soc_intel_skylake_config *config;
|
||||||
ROMSTAGE_CONST struct device *tree_dev;
|
ROMSTAGE_CONST struct device *tree_dev;
|
||||||
const struct lpss_i2c_speed_config *sptr;
|
|
||||||
enum i2c_speed speed;
|
|
||||||
pci_devfn_t dev;
|
pci_devfn_t dev;
|
||||||
int devfn;
|
int devfn;
|
||||||
uintptr_t base;
|
uintptr_t base;
|
||||||
|
@ -86,17 +84,7 @@ static void i2c_early_init_bus(unsigned bus)
|
||||||
write32(reg, value);
|
write32(reg, value);
|
||||||
|
|
||||||
/* Initialize the controller */
|
/* Initialize the controller */
|
||||||
speed = config->i2c[bus].speed ? : I2C_SPEED_FAST;
|
lpss_i2c_init(bus, &config->i2c[bus]);
|
||||||
lpss_i2c_init(bus, speed);
|
|
||||||
|
|
||||||
/* Apply custom speed config if it has been set by the board */
|
|
||||||
for (value = 0; value < LPSS_I2C_SPEED_CONFIG_COUNT; value++) {
|
|
||||||
sptr = &config->i2c[bus].speed_config[value];
|
|
||||||
if (sptr->speed == speed) {
|
|
||||||
lpss_i2c_set_speed_config(bus, sptr);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void i2c_early_init(void)
|
void i2c_early_init(void)
|
||||||
|
|
|
@ -201,7 +201,7 @@ struct soc_intel_skylake_config {
|
||||||
/* I2C */
|
/* I2C */
|
||||||
/* Bus voltage level, default is 3.3V */
|
/* Bus voltage level, default is 3.3V */
|
||||||
enum skylake_i2c_voltage i2c_voltage[SKYLAKE_I2C_DEV_MAX];
|
enum skylake_i2c_voltage i2c_voltage[SKYLAKE_I2C_DEV_MAX];
|
||||||
struct skylake_i2c_config i2c[SKYLAKE_I2C_DEV_MAX];
|
struct lpss_i2c_bus_config i2c[SKYLAKE_I2C_DEV_MAX];
|
||||||
|
|
||||||
/* Camera */
|
/* Camera */
|
||||||
u8 Cio2Enable;
|
u8 Cio2Enable;
|
||||||
|
|
|
@ -56,24 +56,12 @@ static int i2c_dev_to_bus(struct device *dev)
|
||||||
static void i2c_dev_init(struct device *dev)
|
static void i2c_dev_init(struct device *dev)
|
||||||
{
|
{
|
||||||
struct soc_intel_skylake_config *config = dev->chip_info;
|
struct soc_intel_skylake_config *config = dev->chip_info;
|
||||||
const struct lpss_i2c_speed_config *sptr;
|
int bus = i2c_dev_to_bus(dev);
|
||||||
enum i2c_speed speed;
|
|
||||||
int i, bus = i2c_dev_to_bus(dev);
|
|
||||||
|
|
||||||
if (!config || bus < 0)
|
if (!config || bus < 0)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
speed = config->i2c[bus].speed ? : I2C_SPEED_FAST;
|
lpss_i2c_init(bus, &config->i2c[bus]);
|
||||||
lpss_i2c_init(bus, speed);
|
|
||||||
|
|
||||||
/* Apply custom speed config if it has been set by the board */
|
|
||||||
for (i = 0; i < LPSS_I2C_SPEED_CONFIG_COUNT; i++) {
|
|
||||||
sptr = &config->i2c[bus].speed_config[i];
|
|
||||||
if (sptr->speed == speed) {
|
|
||||||
lpss_i2c_set_speed_config(bus, sptr);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Generate ACPI I2C device objects */
|
/* Generate ACPI I2C device objects */
|
||||||
|
@ -86,7 +74,7 @@ static void i2c_fill_ssdt(struct device *dev)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
acpigen_write_scope(acpi_device_path(dev));
|
acpigen_write_scope(acpi_device_path(dev));
|
||||||
lpss_i2c_acpi_fill_ssdt(config->i2c[bus].speed_config);
|
lpss_i2c_acpi_fill_ssdt(&config->i2c[bus]);
|
||||||
acpigen_pop_len();
|
acpigen_pop_len();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue