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soc/amd/[cezanne,picasso,sabrina]/Kconfig: Add PSP_APOB_DRAM_SIZE config option 

The APOB in sabrina is larger than in cezanne/picasso and no longer
fits in the previously allocated 64K space for it. Other symbols are
placed immediately after the APOB region and end up corrupting the APOB
data on sabrina.

Add a Kconfig option to specify the APOB size in DRAM to reserve enough
memory and increase the size for sabrina to 128K

TEST=Timeless builds are identical for mandolin/majolica for PCO/CZN.
Build chausie and verify symbols do not overlap _apob region
BUG=b:224056176

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: Ia5dbacae67ff02fc8a6ec84b9007110ca254daa3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65852
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Fred Reitberger 2022-07-14 11:06:30 -04:00 committed by Martin L Roth
parent 8de0e369e3
commit 475e2824a8
5 changed files with 16 additions and 4 deletions
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4
src/soc/amd/cezanne/Kconfig
View File

@ -106,6 +106,10 @@ config PSP_APOB_DRAM_ADDRESS
Location in DRAM where the PSP will copy the AGESA PSP Output
Block.
config PSP_APOB_DRAM_SIZE
hex
default 0x10000
config PSP_SHAREDMEM_BASE
hex
default 0x2011000 if VBOOT

4
src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
View File

@ -62,7 +62,7 @@ BOOTBLOCK_ADDR = BOOTBLOCK_END - CONFIG_C_ENV_BOOTBLOCK_SIZE;
* +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40
* | Transfer Info Structure |
* +--------------------------------+ PSP_SHAREDMEM_BASE
* | APOB (64KiB) |
* | APOB (PSP_APOB_DRAM_SIZE) |
* +--------------------------------+ PSP_APOB_DRAM_ADDRESS
* | Early BSP stack |
* | (EARLYRAM_BSP_STACK_SIZE) |
@ -83,7 +83,7 @@ SECTIONS
EARLY_RESERVED_DRAM_START(CONFIG_EARLY_RESERVED_DRAM_BASE)
EARLYRAM_STACK(., CONFIG_EARLYRAM_BSP_STACK_SIZE)
REGION(apob, CONFIG_PSP_APOB_DRAM_ADDRESS, 64K, 1)
REGION(apob, CONFIG_PSP_APOB_DRAM_ADDRESS, CONFIG_PSP_APOB_DRAM_SIZE, 1)
#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)
PSP_SHAREDMEM_DRAM_START(CONFIG_PSP_SHAREDMEM_BASE)

4
src/soc/amd/picasso/Kconfig
View File

@ -117,6 +117,10 @@ config PSP_APOB_DRAM_ADDRESS
Location in DRAM where the PSP will copy the AGESA PSP Output
Block.
config PSP_APOB_DRAM_SIZE
hex
default 0x10000
config PSP_SHAREDMEM_BASE
hex
default 0x2011000 if VBOOT

6
src/soc/amd/sabrina/Kconfig
View File

@ -123,9 +123,13 @@ config PSP_APOB_DRAM_ADDRESS
Location in DRAM where the PSP will copy the AGESA PSP Output
Block.
config PSP_APOB_DRAM_SIZE
hex
default 0x20000
config PSP_SHAREDMEM_BASE
hex
default 0x2011000 if VBOOT
default 0x2021000 if VBOOT
default 0x0
help
This variable defines the base address in DRAM memory where PSP copies

2
src/soc/amd/sabrina/root_complex.c
View File

@ -88,7 +88,7 @@ struct dptc_input {
* | PSP shared (vboot workbuf) |
* | (PSP_SHAREDMEM_SIZE) |
* +--------------------------------+ PSP_SHAREDMEM_BASE
* | APOB (64KiB) |
* | APOB (128KiB) |
* +--------------------------------+ PSP_APOB_DRAM_ADDRESS
* | Early BSP stack |
* | (EARLYRAM_BSP_STACK_SIZE) |