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mb/intel/tglrvp: Enable PCIEXP_HOTPLUG for TCSS TBT/USB4 

This change enables PCIEXP_HOTPLUG to support resource allocation for
TCSS TBT/USB4.

BUG=b:149186922

Change-Id: Id3066204c8a780ade251c7be4052a60a861e43db
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41543
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
This commit is contained in:
Brandon Breitenstein 2020-05-19 13:57:24 -07:00 committed by Patrick Georgi
parent dbf6f688aa
commit 478d47f777
1 changed files with 13 additions and 0 deletions
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13
src/mainboard/intel/tglrvp/Kconfig
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@ -17,6 +17,7 @@ config BOARD_SPECIFIC_OPTIONS
select INTEL_LPSS_UART_FOR_CONSOLE select INTEL_LPSS_UART_FOR_CONSOLE
select DRIVERS_INTEL_ISH select DRIVERS_INTEL_ISH
select EC_ACPI select EC_ACPI
select PCIEXP_HOTPLUG
config CHROMEOS config CHROMEOS
bool bool
@ -55,6 +56,18 @@ config MAX_CPUS
int int
default 8 default 8
config PCIEXP_HOTPLUG_BUSES
int
default 42
config PCIEXP_HOTPLUG_MEM
hex
default 0xc200000 # 194 MiB
config PCIEXP_HOTPLUG_PREFETCH_MEM
hex
default 0x1c00000 # 448 MiB
config DEVICETREE config DEVICETREE
string string
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"