mb/google/drallion: add memory sku id

Drallion will use soldered down memory and use
GPP_F12 to GPP_F16 indicates mem_id.

BUG=b:139397313
BRANCH=N/A
TEST=N/A

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Ib5ada54fd2b8f358b59de8089e5405cf3e34825a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
This commit is contained in:
Eric Lai 2019-08-28 16:51:07 +08:00 committed by Patrick Georgi
parent 00ad48554a
commit 4822630c0c
4 changed files with 43 additions and 0 deletions

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@ -20,3 +20,5 @@ bootblock-y += gpio.c
ramstage-y += gpio.c
romstage-y += gpio.c
verstage-y += gpio.c
romstage-y += memory.c

View File

@ -25,6 +25,13 @@
/* Recovery mode */
#define GPIO_REC_MODE GPP_E8
/* Memory configuration board straps */
#define GPIO_MEM_CONFIG_0 GPP_F12
#define GPIO_MEM_CONFIG_1 GPP_F13
#define GPIO_MEM_CONFIG_2 GPP_F14
#define GPIO_MEM_CONFIG_3 GPP_F15
#define GPIO_MEM_CONFIG_4 GPP_F16
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);

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@ -22,4 +22,7 @@
#define VARIANT_SKU_ID_SIGNED_EC 4
#define VARIANT_SKU_NAME_SIGNED_EC "sku4"
/* Return memory SKU for the variant */
int variant_memory_sku(void);
#endif

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@ -0,0 +1,31 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2019 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <variant/variant.h>
#include <gpio.h>
#include <variant/gpio.h>
int variant_memory_sku(void)
{
gpio_t spd_gpios[] = {
GPIO_MEM_CONFIG_0,
GPIO_MEM_CONFIG_1,
GPIO_MEM_CONFIG_2,
GPIO_MEM_CONFIG_3,
GPIO_MEM_CONFIG_4,
};
return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios));
}