mb/google/guybrush/var/nipperkin: Enable GPP2 for NVMe bridge eMMC storage

BUG=b:195269555
BRANCH=guybrush
TEST=emerge-guybrush coreboot chromeos-bootimage
     eMMC sku is bootable

Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Change-Id: If9e0fdc1667cbaac05fdf4c6689d47a561016c9e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58413
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Kevin Chiu 2021-10-18 16:39:20 +08:00 committed by Felix Held
parent 38107fa80e
commit 48bd857789
1 changed files with 9 additions and 0 deletions

View File

@ -34,6 +34,15 @@ chip soc/amd/cezanne
register "name" = ""NVME""
device pci 00.0 on end
end
probe STORAGE STORAGE_EMMC
end # EMMC
device ref gpp_bridge_3 on
# Required so the NVMe gets placed into D3 when entering S0i3.
chip drivers/pcie/rtd3/device
register "name" = ""NVME""
device pci 00.0 on end
end
probe STORAGE STORAGE_SSD
end # NVMe
device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
device ref acp on