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cpu/via/car: drop CARTEST 

It's broken for years and nobody noticed (%ei for %esi and stackerr for
.Lhlt). It would also leave CAR not zeroed out.

Change-Id: Ib1ca8e8e71ea8d1bf834c349fd6e2ca81538b6eb
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/25797
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Lubomir Rintel 2018-01-01 14:36:49 +01:00 committed by Patrick Georgi
parent 9618cf4362
commit 49b4285c0c
1 changed files with 0 additions and 32 deletions
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32
src/cpu/via/car/cache_as_ram.inc
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@ -153,18 +153,6 @@ clear_fixed_var_mtrr_out:
xorl %eax, %eax xorl %eax, %eax
rep stosl rep stosl
#ifdef CARTEST
/*
* IMPORTANT: The following calculation _must_ be done at runtime. See
* https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
*/
movl $copy_and_run, %esi
andl $(~(CONFIG_XIP_ROM_SIZE - 1)), %ei
movl %esi, %edi
movl $(CONFIG_XIP_ROM_SIZE >> 2), %ecx
rep lodsl
#endif
/* /*
* The key point of this CAR code is C7 cache does not turn into * The key point of this CAR code is C7 cache does not turn into
* "no fill" mode, which is not compatible with general CAR code. * "no fill" mode, which is not compatible with general CAR code.
@ -173,26 +161,6 @@ clear_fixed_var_mtrr_out:
movl $(CacheBase + CacheSize - 4), %eax movl $(CacheBase + CacheSize - 4), %eax
movl %eax, %esp movl %eax, %esp
#ifdef CARTEST
testok:
post_code(0x40)
xorl %edx, %edx
xorl %eax, %eax
movl $0x5c5c, %edx
pushl %edx
pushl %edx
pushl %edx
pushl %edx
pushl %edx
popl %esi
popl %esi
popl %eax
popl %eax
popl %eax
cmpl %edx, %eax
jne stackerr
#endif
/* Restore the BIST result. */ /* Restore the BIST result. */
movl %ebp, %eax movl %ebp, %eax