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mb/google/brya/variants/nereid: enable CNVi bluetooth in overridetree 

When using CNVi WLAN on ADL-N, the internal USB2 port 10 is used for
bluetooth. So update the nereid overridetree to enable port 10.

BUG=b:236162084
TEST=USE="project_nereid emerge-nissa coreboot" and verify it builds
without error.

Signed-off-by: Jesper Lin <jesper_lin@wistron.corp-partner.google.com>
Change-Id: Ic45301b863383e447b2dd3e06811b469cc247229
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65188
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jesper Lin 2022-06-17 11:32:24 +08:00 committed by Felix Held
parent e7b96c32c1
commit 49d0204c31
1 changed files with 8 additions and 0 deletions
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8
src/mainboard/google/brya/variants/nereid/overridetree.cb
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@ -18,6 +18,7 @@ chip soc/intel/alderlake
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WFC register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WFC
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for PCIe WLAN register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for PCIe WLAN
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
# Configure external V1P05/Vnn/VnnSx Rails # Configure external V1P05/Vnn/VnnSx Rails
register "ext_fivr_settings" = "{ register "ext_fivr_settings" = "{
@ -311,6 +312,13 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
device ref usb2_port8 on end device ref usb2_port8 on end
end end
chip drivers/usb/acpi
register "desc" = ""CNVi Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
device ref usb2_port10 on end
end
chip drivers/usb/acpi chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (MLB)"" register "desc" = ""USB3 Type-A Port A0 (MLB)""
register "type" = "UPC_TYPE_USB3_A" register "type" = "UPC_TYPE_USB3_A"