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src/mainboard/ocp/monolake: Set end of post GPIO 

Set the end of post GPIO to the BMC. This gets IPMI working on the BMC.

Change-Id: I1a0055cdfd4a973b5f42570723bd95f1844dd9a7
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Marc Jones 2021-05-23 12:17:54 -06:00 committed by Werner Zeh
parent bf2f0757a7
commit 4a3e7dd31d
1 changed files with 12 additions and 0 deletions
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12
src/mainboard/ocp/monolake/mainboard.c
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@ -14,6 +14,7 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <bootstate.h>
#include <device/device.h> #include <device/device.h>
#include <pc80/mc146818rtc.h> #include <pc80/mc146818rtc.h>
#include <cf9_reset.h> #include <cf9_reset.h>
@ -22,6 +23,7 @@
#include <drivers/vpd/vpd.h> #include <drivers/vpd/vpd.h>
#include <console/console.h> #include <console/console.h>
#include <drivers/ipmi/ipmi_ops.h> #include <drivers/ipmi/ipmi_ops.h>
#include <gpio.h>
#include "ipmi.h" #include "ipmi.h"
/* VPD variable for enabling/disabling FRB2 timer. */ /* VPD variable for enabling/disabling FRB2 timer. */
#define FRB2_TIMER "FRB2_TIMER" #define FRB2_TIMER "FRB2_TIMER"
@ -232,3 +234,13 @@ const char *smbios_mainboard_serial_number(void)
else else
return CONFIG_MAINBOARD_SERIAL_NUMBER; return CONFIG_MAINBOARD_SERIAL_NUMBER;
} }
/* Set the BMC BIOS POST complete GPIO (FM_BIOS_POST_CMPLT_N) on payload load. */
static void bmc_set_post_complete_gpio_callback(void *arg)
{
/* GPIO 46 FM_BIOS_POST_CMPLT_N */
gpio_set(46, 0);
printk(BIOS_DEBUG, "BMC: POST complete gpio set\n");
}
BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, bmc_set_post_complete_gpio_callback, NULL);