src/cpu,soc/amd/common/block/cpu: Add preload_microcode
This will enable preloading the microcode. By preloading the file, into cbfs_cache we reduce boot time. BUG=b:179699789 TEST=Boot guybrush with CL chain and see microcode preloading and a reduction of 1 ms. | 112 - started reading uCode | 1.041 | 1.204 Δ( 0.16, 0.01%) | | 113 - finished reading uCode | 1.365 | 0.011 Δ( -1.35, -0.10%) | Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: If0c634c692c97769e71acd1175fc464dc592c356 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58963 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
parent
6b446b991b
commit
4b5a490b6f
|
@ -56,7 +56,12 @@ $(obj)/cpu_microcode_blob.bin: $$(wildcard $$(cpu_microcode_bins))
|
||||||
|
|
||||||
cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin
|
cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin
|
||||||
cpu_microcode_blob.bin-type := microcode
|
cpu_microcode_blob.bin-type := microcode
|
||||||
|
# The AMD LPC SPI DMA controller requires source files to be 64 byte aligned.
|
||||||
|
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
|
||||||
|
cpu_microcode_blob.bin-align := 64
|
||||||
|
else
|
||||||
cpu_microcode_blob.bin-align := 16
|
cpu_microcode_blob.bin-align := 16
|
||||||
|
endif
|
||||||
|
|
||||||
ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),)
|
ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),)
|
||||||
cpu_microcode_blob.bin-COREBOOT-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC)
|
cpu_microcode_blob.bin-COREBOOT-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC)
|
||||||
|
|
|
@ -2,5 +2,6 @@
|
||||||
#define CPU_AMD_MICROCODE_H
|
#define CPU_AMD_MICROCODE_H
|
||||||
|
|
||||||
void amd_update_microcode_from_cbfs(void);
|
void amd_update_microcode_from_cbfs(void);
|
||||||
|
void preload_microcode(void);
|
||||||
|
|
||||||
#endif /* CPU_AMD_MICROCODE_H */
|
#endif /* CPU_AMD_MICROCODE_H */
|
||||||
|
|
|
@ -10,6 +10,8 @@
|
||||||
#include <cbfs.h>
|
#include <cbfs.h>
|
||||||
#include <timestamp.h>
|
#include <timestamp.h>
|
||||||
|
|
||||||
|
#define CPU_MICROCODE_BLOB_NAME "cpu_microcode_blob.bin"
|
||||||
|
|
||||||
_Static_assert(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE_SIZE > 0,
|
_Static_assert(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE_SIZE > 0,
|
||||||
"SOC_AMD_COMMON_BLOCK_UCODE_SIZE is not set");
|
"SOC_AMD_COMMON_BLOCK_UCODE_SIZE is not set");
|
||||||
|
|
||||||
|
@ -97,9 +99,10 @@ void amd_update_microcode_from_cbfs(void)
|
||||||
/* Cache the buffer so each CPU doesn't need to read the uCode from flash */
|
/* Cache the buffer so each CPU doesn't need to read the uCode from flash */
|
||||||
if (!cache_valid) {
|
if (!cache_valid) {
|
||||||
timestamp_add_now(TS_READ_UCODE_START);
|
timestamp_add_now(TS_READ_UCODE_START);
|
||||||
ucode_list = cbfs_map("cpu_microcode_blob.bin", &ucode_len);
|
ucode_list = cbfs_map(CPU_MICROCODE_BLOB_NAME, &ucode_len);
|
||||||
if (!ucode_list) {
|
if (!ucode_list) {
|
||||||
printk(BIOS_WARNING, "cpu_microcode_blob.bin not found. Skipping updates.\n");
|
printk(BIOS_WARNING,
|
||||||
|
CPU_MICROCODE_BLOB_NAME " not found. Skipping updates.\n");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -120,3 +123,12 @@ void amd_update_microcode_from_cbfs(void)
|
||||||
|
|
||||||
apply_microcode_patch(&ucode_cache);
|
apply_microcode_patch(&ucode_cache);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void preload_microcode(void)
|
||||||
|
{
|
||||||
|
if (!CONFIG(CBFS_PRELOAD))
|
||||||
|
return;
|
||||||
|
|
||||||
|
printk(BIOS_DEBUG, "Preloading microcode %s\n", CPU_MICROCODE_BLOB_NAME);
|
||||||
|
cbfs_preload(CPU_MICROCODE_BLOB_NAME);
|
||||||
|
}
|
||||||
|
|
Loading…
Reference in New Issue