Add acpi_get_sleep_type() to i82371eb and P2B _PTS/_WAK methods
Build fix for src/arch/i386/boot/acpi.c if !CONFIG_SMP Also check for acpi_slp_type 2 in acpi_is_wakeup, since S2 uses the same acpi wakeup vector as S3. Add _PTS/_WAK methods to turn off/on the CPU/case fans and blink the power LED while sleeping. acpi_get_sleep_type() is in a seperate file i82371eb_wakeup.c because it is used in both romstage and ramstage after patch 3/3, whereas i82371eb_early_pm.c is used only in romstage. I used the name acpi_get_sleep_type instead of acpi_is_wakeup_early because I think acpi_is_wakeup_early is a bit misleading as a name since it doesn't return a boolean value. Other chipsets so far only ever set acpi_slp_type to 0 and 3, so the added check for acpi_slp_type == 2 (resume from S2) should not change behaviour of other boards: northbridge/intel/i945/northbridge.c:256:extern u8 acpi_slp_type; northbridge/intel/i945/northbridge.c:263: acpi_slp_type=0; northbridge/intel/i945/northbridge.c:267: acpi_slp_type=3; northbridge/intel/i945/northbridge.c:271: acpi_slp_type=0; southbridge/intel/i82801gx/i82801gx_lpc.c:171:extern u8 acpi_slp_type; southbridge/via/vt8237r/vt8237r_lpc.c:149:extern u8 acpi_slp_type; southbridge/via/vt8237r/vt8237r_lpc.c:238: acpi_slp_type = ((tmp & (7 << 10)) >> 10) == 1 ? 3 : 0 ; southbridge/via/vt8237r/vt8237r_lpc.c:239: printk(BIOS_DEBUG, "SLP_TYP type was %x %x\n", tmp, acpi_slp_type); Change-Id: I13feff0b8f49aa988e5467cdbef02981f0a6be8a Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/188 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Tobias Diedrich
Patrick Georgi
parent
78834b794d
commit
4e22a3bc58
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@ -481,7 +481,8 @@ u8 acpi_slp_type = 0;
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static int acpi_is_wakeup(void)
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{
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return (acpi_slp_type == 3);
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/* Both resume from S2 and resume from S3 restart at CPU reset */
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return (acpi_slp_type == 3 || acpi_slp_type == 2);
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}
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static acpi_rsdp_t *valid_rsdp(acpi_rsdp_t *rsdp)
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@ -567,9 +568,11 @@ void *acpi_find_wakeup_vector(void)
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return wake_vec;
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}
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#if CONFIG_SMP
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extern char *lowmem_backup;
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extern char *lowmem_backup_ptr;
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extern int lowmem_backup_size;
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#endif
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#define WAKEUP_BASE 0x600
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@ -588,12 +591,14 @@ void acpi_jump_to_wakeup(void *vector)
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return;
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}
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#if CONFIG_SMP
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// FIXME: This should go into the ACPI backup memory, too. No pork saussages.
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/*
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* Just restore the SMP trampoline and continue with wakeup on
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* assembly level.
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*/
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memcpy(lowmem_backup_ptr, lowmem_backup, lowmem_backup_size);
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#endif
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/* Copy wakeup trampoline in place. */
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memcpy((void *)WAKEUP_BASE, &__wakeup, (size_t)&__wakeup_size);
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@ -191,8 +191,10 @@ extern u8 acpi_slp_type;
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void cbmem_initialize(void)
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{
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#if CONFIG_HAVE_ACPI_RESUME
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if (acpi_slp_type == 3) {
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printk(BIOS_DEBUG, "%s: acpi_slp_type=%d\n", __func__, acpi_slp_type);
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if (acpi_slp_type == 3 || acpi_slp_type == 2) {
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if (!cbmem_reinit(high_tables_base)) {
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printk(BIOS_DEBUG, "cbmem_reinit failed\n");
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/* Something went wrong, our high memory area got wiped */
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acpi_slp_type = 0;
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cbmem_init(high_tables_base, high_tables_size);
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@ -21,27 +21,51 @@
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DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1)
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{
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/* For now only define 2 power states:
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* - S0 which is fully on
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* - S5 which is soft off
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* Any others would involve declaring the wake up methods.
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*/
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/* intel i82371eb (piix4e) datasheet, section 7.2.3, page 142 */
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/*
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000b / 0x0: soft off/suspend to disk (soff/std) s5
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001b / 0x1: suspend to ram (str) s3
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010b / 0x2: powered on suspend, context lost (poscl) s1
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011b / 0x3: powered on suspend, cpu context lost (posccl) s2
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100b / 0x4: powered on suspend, context maintained (pos) s4
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101b / 0x5: working (clock control) s0
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110b / 0x6: reserved
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111b / 0x7: reserved
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* Intel 82371EB (PIIX4E) datasheet, section 7.2.3, page 142
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*
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* 0: soft off/suspend to disk S5
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* 1: suspend to ram S3
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* 2: powered on suspend, context lost S2
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* Note: 'context lost' means the CPU restarts at the reset
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* vector
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* 3: powered on suspend, CPU context lost S1
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* Note: Looks like 'CPU context lost' does _not_ mean the
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* CPU restarts at the reset vector. Most likely only
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* caches are lost, so both 0x3 and 0x4 map to acpi S1
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* 4: powered on suspend, context maintained S1
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* 5: working (clock control) S0
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* 6: reserved
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* 7: reserved
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*/
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Name (\_S0, Package () { 0x05, 0x05, 0x00, 0x00 })
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Name (\_S1, Package () { 0x03, 0x03, 0x00, 0x00 })
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Name (\_S5, Package () { 0x00, 0x00, 0x00, 0x00 })
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OperationRegion (SIO1, SystemIO, Add(DEFAULT_PMBASE, GPO0), 2)
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Field (SIO1, ByteAcc, NoLock, Preserve)
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{
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FANP, 1, /* CPU/case fan power */
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Offset (0x01),
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PLED, 1,
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}
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Method (\_PTS, 1, NotSerialized)
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{
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/* Disable fan, blink power led */
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Store (Zero, FANP)
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Store (Zero, PLED)
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}
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Method (\_WAK, 1, NotSerialized)
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{
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/* Re-enable fan, stop power led blinking */
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Store (One, FANP)
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Store (One, PLED)
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/* wake OK */
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Return(Package(0x02){0x00, 0x00})
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}
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/* Root of the bus hierarchy */
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Scope (\_SB)
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{
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@ -1,6 +1,7 @@
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config SOUTHBRIDGE_INTEL_I82371EB
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bool
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select TINY_BOOTBLOCK
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select HAVE_ACPI_RESUME if HAVE_ACPI_TABLES
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config BOOTBLOCK_SOUTHBRIDGE_INIT
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string
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@ -26,6 +26,7 @@ driver-y += smbus.c
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driver-y += reset.c
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driver-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
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driver-$(CONFIG_GENERATE_ACPI_TABLES) += acpi_tables.c
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driver-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.c
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romstage-y += early_pm.c
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romstage-y += early_smbus.c
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@ -31,6 +31,11 @@
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#include "i82371eb.h"
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#include "smbus.h"
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#if CONFIG_HAVE_ACPI_RESUME == 1
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extern u8 acpi_slp_type;
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int acpi_get_sleep_type(void);
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#endif
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static void pwrmgt_enable(struct device *dev)
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{
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struct southbridge_intel_i82371eb_config *sb = dev->chip_info;
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@ -87,7 +92,13 @@ static void pwrmgt_enable(struct device *dev)
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outw(0xffff, DEFAULT_PMBASE + GLBSTS);
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outl(0xffffffff, DEFAULT_PMBASE + DEVSTS);
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/* set pmcntrl default */
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#if CONFIG_HAVE_ACPI_RESUME == 1
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/* this reads PMCNTRL, so we have to call it before writing the
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* default value */
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acpi_slp_type = acpi_get_sleep_type();
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#endif
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/* set PMCNTRL default */
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outw(SUS_TYP_S0|SCI_EN, DEFAULT_PMBASE + PMCNTRL);
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}
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@ -0,0 +1,59 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdint.h>
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#include <arch/io.h>
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#include <console/console.h>
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#include "i82371eb.h"
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int acpi_get_sleep_type(void);
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/*
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* Intel 82371EB (PIIX4E) datasheet, section 7.2.3, page 142
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*
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* 0: soft off/suspend to disk S5
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* 1: suspend to ram S3
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* 2: powered on suspend, context lost S2
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* Note: 'context lost' means the CPU restarts at the reset
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* vector
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* 3: powered on suspend, CPU context lost S1
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* Note: Looks like 'CPU context lost' does _not_ mean the
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* CPU restarts at the reset vector. Most likely only
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* caches are lost, so both 0x3 and 0x4 map to acpi S1
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* 4: powered on suspend, context maintained S1
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* 5: working (clock control) S0
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* 6: reserved
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* 7: reserved
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*/
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static const u8 acpi_sus_to_slp_typ[8] = {
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5, 3, 2, 1, 1, 0, 0, 0
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};
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int acpi_get_sleep_type(void)
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{
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u16 reg, result;
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reg = inw(DEFAULT_PMBASE + PMCNTRL);
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result = acpi_sus_to_slp_typ[(reg >> 10) & 7];
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printk(BIOS_DEBUG, "Wakeup from ACPI sleep type S%d (PMCNTRL=%04x)\n", result, reg);
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return result;
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}
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