AGESA fam14 boards: Clean up devicetree
Remove double nesting of chip northbridge/amd. There is requirement to keep SPD address map in the same chip block with device 0:18.2. Change-Id: Ib212f24c3d697a009d2ca8e2c77220de4bfb7573 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30733 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
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commit
4ebdf34e13
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@ -20,9 +20,7 @@ chip northbridge/amd/agesa/family14/root_complex
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end
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device domain 0 on
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subsystemid 0x1022 0x1510 inherit
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chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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# device pci 18.0 on # northbridge
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chip northbridge/amd/agesa/family14 # PCI side of HT root complex
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chip northbridge/amd/agesa/family14
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device pci 0.0 on end # Root Complex
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device pci 1.0 on end # Internal Graphics P2P bridge, 9802 to 9806
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device pci 1.1 on end # Internal HDMI Audio
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@ -33,7 +31,7 @@ chip northbridge/amd/agesa/family14/root_complex
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device pci 8.0 off end # NB/SB Link P2P bridge
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end # agesa northbridge
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chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
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chip southbridge/amd/cimx/sb800
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device pci 11.0 on end # SATA
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device pci 12.0 on end # OHCI USB 0-4
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device pci 12.2 on end # EHCI USB 0-4
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@ -71,10 +69,11 @@ chip northbridge/amd/agesa/family14/root_complex
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register "gpp_configuration" = "4" #1:1:1:1
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register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
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end #southbridge/amd/cimx/sb800
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# end # device pci 18.0
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# These seem unnecessary
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chip northbridge/amd/agesa/family14
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# These seem unnecessary
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device pci 18.0 on end
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#device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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@ -87,6 +86,8 @@ chip northbridge/amd/agesa/family14/root_complex
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{
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{ {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
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}"
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end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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end # agesa northbridge
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end #domain
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end #northbridge/amd/agesa/family14/root_complex
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@ -20,9 +20,7 @@ chip northbridge/amd/agesa/family14/root_complex
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end
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device domain 0 on
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subsystemid 0x1022 0x1510 inherit
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chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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# device pci 18.0 on # northbridge
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chip northbridge/amd/agesa/family14 # PCI side of HT root complex
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chip northbridge/amd/agesa/family14
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device pci 0.0 on end # Root Complex
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device pci 1.0 on end # Internal Graphics P2P bridge 0x980[2456]
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device pci 4.0 on end # PCIE P2P bridge on-board NIC
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@ -32,7 +30,7 @@ chip northbridge/amd/agesa/family14/root_complex
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device pci 8.0 off end # NB/SB Link P2P bridge
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end # agesa northbridge
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chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
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chip southbridge/amd/cimx/sb800
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device pci 11.0 on end # SATA
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device pci 12.0 on end # OHCI USB 0-4
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device pci 12.2 on end # EHCI USB 0-4
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@ -135,8 +133,10 @@ chip northbridge/amd/agesa/family14/root_complex
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register "imc_zone1_fanspeeds" = "{100, 10, 6, 4, 3, 0, 0, 0 }"
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end #southbridge/amd/cimx/sb800
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# end # device pci 18.0
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# These seem unnecessary
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chip northbridge/amd/agesa/family14
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# These seem unnecessary
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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@ -152,6 +152,7 @@ chip northbridge/amd/agesa/family14/root_complex
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{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
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}"
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end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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end # agesa northbridge
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end #domain
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end #northbridge/amd/agesa/family14/root_complex
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end
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device domain 0 on
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subsystemid 0x1022 0x1510 inherit
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chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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# device pci 18.0 on # northbridge
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chip northbridge/amd/agesa/family14 # PCI side of HT root complex
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chip northbridge/amd/agesa/family14
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device pci 0.0 on end # Root Complex
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device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
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device pci 1.1 on end # Internal HDMI Audio
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@ -33,7 +31,7 @@ chip northbridge/amd/agesa/family14/root_complex
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device pci 8.0 on end # NB/SB Link P2P bridge
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end # agesa northbridge
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chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
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chip southbridge/amd/cimx/sb800
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device pci 11.0 on end # SATA
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device pci 12.0 on end # USB
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device pci 12.1 on end # USB
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@ -41,14 +39,7 @@ chip northbridge/amd/agesa/family14/root_complex
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device pci 13.0 on end # USB
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device pci 13.1 on end # USB
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device pci 13.2 on end # USB
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device pci 14.0 on # SM
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## chip drivers/generic/generic #dimm 0-0-0
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## device i2c 50 on end
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## end
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## chip drivers/generic/generic #dimm 0-0-1
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## device i2c 51 on end
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## end
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end # SM
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device pci 14.0 on end # SM
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device pci 14.1 on end # IDE 0x439c
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device pci 14.2 on end # HDA 0x4383
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device pci 14.3 on # LPC 0x439d
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@ -88,8 +79,10 @@ chip northbridge/amd/agesa/family14/root_complex
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register "gpp_configuration" = "0" #4:0:0:0 (really need to disable all 4 somehow)
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register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
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end #southbridge/amd/cimx/sb800
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# end # device pci 18.0
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# These seem unnecessary
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chip northbridge/amd/agesa/family14
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# These seem unnecessary
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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@ -102,6 +95,7 @@ chip northbridge/amd/agesa/family14/root_complex
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{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
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}"
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end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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end # agesa northbridge
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end #domain
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end #northbridge/amd/agesa/family14/root_complex
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end
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device domain 0 on
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subsystemid 0x1022 0x1510 inherit
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chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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# device pci 18.0 on # northbridge
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chip northbridge/amd/agesa/family14 # PCI side of HT root complex
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chip northbridge/amd/agesa/family14
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device pci 0.0 on end # Root Complex
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device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
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device pci 1.1 on end # Internal HDMI Audio
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device pci 8.0 on end # NB/SB Link P2P bridge
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end # agesa northbridge
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chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
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chip southbridge/amd/cimx/sb800
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device pci 11.0 on end # SATA
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device pci 12.0 on end # USB
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device pci 12.1 on end # USB
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@ -41,18 +39,10 @@ chip northbridge/amd/agesa/family14/root_complex
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device pci 13.0 on end # USB
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device pci 13.1 on end # USB
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device pci 13.2 on end # USB
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device pci 14.0 on # SM
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## chip drivers/generic/generic #dimm 0-0-0
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## device i2c 50 on end
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## end
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## chip drivers/generic/generic #dimm 0-0-1
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## device i2c 51 on end
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## end
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end # SM
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device pci 14.0 on end # SM
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device pci 14.1 on end # IDE 0x439c
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device pci 14.2 on end # HDA 0x4383
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device pci 14.3 on # LPC 0x439d
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end #LPC
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device pci 14.3 on end # LPC 0x439d
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device pci 14.4 off end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0}
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device pci 14.5 on end # USB 2
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device pci 15.0 off end # PCIe PortA
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@ -64,8 +54,11 @@ chip northbridge/amd/agesa/family14/root_complex
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register "gpp_configuration" = "0" #4:0:0:0 (really need to disable all 4 somehow)
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register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
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end #southbridge/amd/cimx/sb800
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# end # device pci 18.0
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# These seem unnecessary
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chip northbridge/amd/agesa/family14
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# These seem unnecessary
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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@ -78,6 +71,7 @@ chip northbridge/amd/agesa/family14/root_complex
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{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
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}"
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end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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end # agesa northbridge
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end #domain
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end #northbridge/amd/agesa/family14/root_complex
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end
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device domain 0 on
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subsystemid 0x1022 0x1510 inherit
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chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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# device pci 18.0 on # northbridge
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chip northbridge/amd/agesa/family14 # PCI side of HT root complex
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chip northbridge/amd/agesa/family14
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device pci 0.0 on end # Root Complex
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device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
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@ -34,7 +32,7 @@ chip northbridge/amd/agesa/family14/root_complex
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device pci 8.0 off end # NB/SB Link P2P bridge
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end # agesa northbridge
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chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
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chip southbridge/amd/cimx/sb800
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device pci 11.0 on end # SATA
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device pci 12.0 on end # USB
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device pci 12.2 on end # USB
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@ -126,9 +124,10 @@ chip northbridge/amd/agesa/family14/root_complex
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register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
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end #southbridge/amd/cimx/sb800
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# end # device pci 18.0
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#
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# These seem unnecessary
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chip northbridge/amd/agesa/family14
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# These seem unnecessary
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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@ -144,6 +143,7 @@ chip northbridge/amd/agesa/family14/root_complex
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{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
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}"
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end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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end # agesa northbridge
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end #domain
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end #northbridge/amd/agesa/family14/root_complex
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end
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device domain 0 on
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subsystemid 0x1022 0x1510 inherit
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chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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# device pci 18.0 on # northbridge
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chip northbridge/amd/agesa/family14 # PCI side of HT root complex
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chip northbridge/amd/agesa/family14
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device pci 0.0 on end # Root Complex
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device pci 1.0 on end # Internal Graphics P2P bridge 0x980[2456]
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device pci 4.0 on end # PCIE P2P bridge on-board NIC
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@ -32,7 +30,7 @@ chip northbridge/amd/agesa/family14/root_complex
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device pci 8.0 off end # NB/SB Link P2P bridge
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end # agesa northbridge
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chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
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chip southbridge/amd/cimx/sb800
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device pci 11.0 on end # SATA
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device pci 12.0 on end # OHCI USB 0-4
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device pci 12.2 on end # EHCI USB 0-4
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@ -79,6 +77,7 @@ chip northbridge/amd/agesa/family14/root_complex
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device pci 15.3 off end # PCIe PortD
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device pci 16.0 off end # OHCI USB 10-13
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device pci 16.2 off end # EHCI USB 10-13
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register "gpp_configuration" = "0" #4:0:0:0 (really need to disable all 4 somehow)
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register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
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@ -131,8 +130,10 @@ chip northbridge/amd/agesa/family14/root_complex
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register "imc_zone1_fanspeeds" = "{100, 10, 6, 4, 3, 0, 0, 0 }"
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end #southbridge/amd/cimx/sb800
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# end # device pci 18.0
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# These seem unnecessary
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chip northbridge/amd/agesa/family14
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# These seem unnecessary
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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@ -148,6 +149,7 @@ chip northbridge/amd/agesa/family14/root_complex
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{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
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}"
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end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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end # agesa northbridge
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end #domain
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end #northbridge/amd/agesa/family14/root_complex
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@ -21,12 +21,9 @@ chip northbridge/amd/agesa/family14/root_complex
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end
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device domain 0 on
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subsystemid 0x1022 0x1510 inherit
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chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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# device pci 18.0 on # northbridge
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chip northbridge/amd/agesa/family14 # PCI side of HT root complex
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chip northbridge/amd/agesa/family14
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device pci 0.0 on end # Root Complex
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device pci 1.0 on end # Internal Graphics P2P bridge 0x980[2456]
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# device pci 1.1 on end # Internal Audio P2P bridge 0x1314
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device pci 4.0 on end # PCIE P2P bridge PCIe slot
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device pci 5.0 off end # PCIE P2P bridge
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device pci 6.0 on end # GbE MAC: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 (10ec:8168)
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@ -34,7 +31,7 @@ chip northbridge/amd/agesa/family14/root_complex
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device pci 8.0 off end # NB/SB Link P2P bridge
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end # agesa northbridge
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chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
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chip southbridge/amd/cimx/sb800
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device pci 11.0 on end # SATA
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device pci 12.0 on end # OHCI USB 0-4
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device pci 12.2 on end # EHCI USB 0-4
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@ -121,8 +118,10 @@ chip northbridge/amd/agesa/family14/root_complex
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register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
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end #southbridge/amd/cimx/sb800
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# end # device pci 18.0
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# These seem unnecessary
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chip northbridge/amd/agesa/family14
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# These seem unnecessary
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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@ -143,6 +142,7 @@ chip northbridge/amd/agesa/family14/root_complex
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{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
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}"
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end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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end # agesa northbridge
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end #domain
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end #northbridge/amd/agesa/family14/root_complex
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@ -20,9 +20,7 @@ chip northbridge/amd/agesa/family14/root_complex
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end
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device domain 0 on
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subsystemid 0x1022 0x1510 inherit
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chip northbridge/amd/agesa/family14 # CPU side of HT root complex
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# device pci 18.0 on # northbridge
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chip northbridge/amd/agesa/family14 # PCI side of HT root complex
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chip northbridge/amd/agesa/family14
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device pci 0.0 on end # Root Complex
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device pci 1.0 on end # Internal Graphics P2P bridge 0x980[2456]
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device pci 4.0 on end # PCIE P2P bridge on-board NIC
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@ -32,7 +30,7 @@ chip northbridge/amd/agesa/family14/root_complex
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device pci 8.0 off end # NB/SB Link P2P bridge
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end # agesa northbridge
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chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
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chip southbridge/amd/cimx/sb800
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device pci 11.0 on end # SATA
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device pci 12.0 on end # OHCI USB 0-4
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device pci 12.2 on end # EHCI USB 0-4
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@ -72,6 +70,7 @@ chip northbridge/amd/agesa/family14/root_complex
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end
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end # smscsuperio
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end #LPC
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device pci 14.4 on end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0}
|
||||
device pci 14.5 off end # OHCI FS/LS USB
|
||||
device pci 14.6 off end # Hudson-E1 GbE MAC: Broadcom BCM5785 (14E4:1699)
|
||||
|
@ -81,11 +80,14 @@ chip northbridge/amd/agesa/family14/root_complex
|
|||
device pci 15.3 off end # PCIe PortD
|
||||
device pci 16.0 on end # OHCI USB 10-13
|
||||
device pci 16.2 on end # EHCI USB 10-13
|
||||
|
||||
register "gpp_configuration" = "4" #1:1:1:1
|
||||
register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
|
||||
end #southbridge/amd/cimx/sb800
|
||||
# end # device pci 18.0
|
||||
# These seem unnecessary
|
||||
|
||||
chip northbridge/amd/agesa/family14
|
||||
|
||||
# These seem unnecessary
|
||||
device pci 18.0 on end
|
||||
device pci 18.1 on end
|
||||
device pci 18.2 on end
|
||||
|
@ -101,6 +103,7 @@ chip northbridge/amd/agesa/family14/root_complex
|
|||
{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
|
||||
}"
|
||||
|
||||
end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
|
||||
end # agesa northbridge
|
||||
|
||||
end #domain
|
||||
end #northbridge/amd/agesa/family14/root_complex
|
||||
|
|
|
@ -20,9 +20,7 @@ chip northbridge/amd/agesa/family14/root_complex
|
|||
end
|
||||
device domain 0 on
|
||||
subsystemid 0x1022 0x1510 inherit
|
||||
chip northbridge/amd/agesa/family14 # CPU side of HT root complex
|
||||
# device pci 18.0 on # northbridge
|
||||
chip northbridge/amd/agesa/family14 # PCI side of HT root complex
|
||||
chip northbridge/amd/agesa/family14
|
||||
device pci 0.0 on end # Root Complex
|
||||
device pci 1.0 on end # Internal Graphics P2P bridge 0x980[2456]
|
||||
#device pci 1.1 on end # Internal HDMI Audio
|
||||
|
@ -33,7 +31,7 @@ chip northbridge/amd/agesa/family14/root_complex
|
|||
device pci 8.0 off end # NB/SB Link P2P bridge
|
||||
end # agesa northbridge
|
||||
|
||||
chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
|
||||
chip southbridge/amd/cimx/sb800
|
||||
device pci 11.0 on end # SATA
|
||||
device pci 12.0 on end # OHCI USB 0-4
|
||||
device pci 12.2 on end # EHCI USB 0-4
|
||||
|
@ -90,8 +88,10 @@ chip northbridge/amd/agesa/family14/root_complex
|
|||
register "gpp_configuration" = "4" #1:1:1:1
|
||||
register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
|
||||
end #southbridge/amd/cimx/sb800
|
||||
# end # device pci 18.0
|
||||
# These seem unnecessary
|
||||
|
||||
chip northbridge/amd/agesa/family14
|
||||
|
||||
# These seem unnecessary
|
||||
device pci 18.0 on end
|
||||
device pci 18.1 on end
|
||||
device pci 18.2 on end
|
||||
|
@ -106,7 +106,7 @@ chip northbridge/amd/agesa/family14/root_complex
|
|||
{ {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
|
||||
{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
|
||||
}"
|
||||
end # agesa northbridge
|
||||
|
||||
end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
|
||||
end #domain
|
||||
end #northbridge/amd/agesa/family14/root_complex
|
||||
|
|
|
@ -21,9 +21,7 @@ chip northbridge/amd/agesa/family14/root_complex
|
|||
end
|
||||
device domain 0 on
|
||||
subsystemid 0x1022 0x1510 inherit
|
||||
chip northbridge/amd/agesa/family14 # CPU side of HT root complex
|
||||
# device pci 18.0 on # northbridge
|
||||
chip northbridge/amd/agesa/family14 # PCI side of HT root complex
|
||||
chip northbridge/amd/agesa/family14
|
||||
device pci 0.0 on end # Root Complex
|
||||
device pci 1.0 off end # Internal Graphics P2P bridge 0x980[2456]
|
||||
device pci 4.0 on end # PCIE P2P bridge on-board NIC 3
|
||||
|
@ -33,7 +31,7 @@ chip northbridge/amd/agesa/family14/root_complex
|
|||
device pci 8.0 on end # NB/SB Link P2P bridge
|
||||
end # agesa northbridge
|
||||
|
||||
chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
|
||||
chip southbridge/amd/cimx/sb800
|
||||
device pci 11.0 on end # SATA
|
||||
device pci 12.0 on end # OHCI USB 0-4
|
||||
device pci 12.2 on end # EHCI USB 0-4
|
||||
|
@ -86,8 +84,9 @@ chip northbridge/amd/agesa/family14/root_complex
|
|||
register "disconnect_pcib" = "1"
|
||||
register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
|
||||
end #southbridge/amd/cimx/sb800
|
||||
# end # device pci 18.0
|
||||
# These seem unnecessary
|
||||
|
||||
chip northbridge/amd/agesa/family14
|
||||
# These seem unnecessary
|
||||
device pci 18.0 on end
|
||||
device pci 18.1 on end
|
||||
device pci 18.2 on end
|
||||
|
@ -96,7 +95,7 @@ chip northbridge/amd/agesa/family14/root_complex
|
|||
device pci 18.5 on end
|
||||
device pci 18.6 on end
|
||||
device pci 18.7 on end
|
||||
end # agesa northbridge
|
||||
|
||||
end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
|
||||
end #domain
|
||||
end #northbridge/amd/agesa/family14/root_complex
|
||||
|
|
Loading…
Reference in New Issue