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AGESA fam16kb: Move clearing of NoSnoopEnable bit 

Originally from commit 4ca72139 move this code now from
cpu/ to northbridge/.

Change-Id: I38517cff273dd8f78bf5eda1d48fd1cd820ced88
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7603
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Kyösti Mälkki 2014-11-25 16:03:12 +02:00
parent 34ad72cd03
commit 4ee82c69a2
2 changed files with 16 additions and 18 deletions
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18
src/cpu/amd/agesa/amd_late_init.c
View File

@ -19,10 +19,6 @@
#include <arch/acpi.h> #include <arch/acpi.h>
#include <bootstate.h> #include <bootstate.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <northbridge/amd/agesa/agesawrapper.h> #include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/agesawrapper_call.h> #include <northbridge/amd/agesa/agesawrapper_call.h>
@ -38,20 +34,6 @@ static void agesawrapper_post_device(void *unused)
AGESAWRAPPER(amdinitlate); AGESAWRAPPER(amdinitlate);
#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY_16KB)
device_t dev;
u32 value;
dev = dev_find_slot(0, PCI_DEVFN(0, 0)); /* clear IoapicSbFeatureEn */
pci_write_config32(dev, 0xF8, 0);
pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */
/* disable No Snoop */
dev = dev_find_slot(0, PCI_DEVFN(1, 1));
value = pci_read_config32(dev, 0x60);
value &= ~(1 << 11);
pci_write_config32(dev, 0x60, value);
#endif
#if CONFIG_AMD_SB_CIMX #if CONFIG_AMD_SB_CIMX
sb_Late_Post(); sb_Late_Post();
#endif #endif

16
src/northbridge/amd/agesa/family16kb/northbridge.c
View File

@ -653,9 +653,25 @@ static const struct pci_driver family10_northbridge __pci_driver = {
.device = PCI_DEVICE_ID_AMD_10H_NB_HT, .device = PCI_DEVICE_ID_AMD_10H_NB_HT,
}; };
static void fam16_finalize(void *chip_info)
{
device_t dev;
u32 value;
dev = dev_find_slot(0, PCI_DEVFN(0, 0)); /* clear IoapicSbFeatureEn */
pci_write_config32(dev, 0xF8, 0);
pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */
/* disable No Snoop */
dev = dev_find_slot(0, PCI_DEVFN(1, 1));
value = pci_read_config32(dev, 0x60);
value &= ~(1 << 11);
pci_write_config32(dev, 0x60, value);
}
struct chip_operations northbridge_amd_agesa_family16kb_ops = { struct chip_operations northbridge_amd_agesa_family16kb_ops = {
CHIP_NAME("AMD FAM16 Northbridge") CHIP_NAME("AMD FAM16 Northbridge")
.enable_dev = 0, .enable_dev = 0,
.final = fam16_finalize,
}; };
static void domain_read_resources(device_t dev) static void domain_read_resources(device_t dev)