include/cpu/x86/msr: move MC0_CTL_MASK to include/cpu/amd/msr

This MSR isn't an architectural MSR, so it shouldn't be in the common
x86 MSR definition header file. From family 17h on this register has
moved to a different location.

Change-Id: Id11d942876da217034e6f912b1058f00bd15c22c
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56246
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>

src/include/cpu/amd/msr.h

@@ -18,6 +18,7 @@
 #define  SMM_LOCK			(1 << 0)
 #define NB_CFG_MSR			0xC001001f
 #define FidVidStatus			0xC0010042
+#define MC0_CTL_MASK			0xC0010044
 #define MC1_CTL_MASK			0xC0010045
 #define MC4_CTL_MASK			0xC0010048
 #define MSR_INTPEND			0xC0010055

src/include/cpu/x86/msr.h

@@ -83,7 +83,6 @@
 #define IA32_VMX_BASIC_MSR              0x480
 #define  VMX_BASIC_HI_DUAL_MONITOR      (1UL << (49 - 32))
 #define IA32_VMX_MISC_MSR               0x485
-#define MC0_CTL_MASK			0xC0010044
 
 #define IA32_PM_ENABLE			0x770
 #define IA32_HWP_CAPABILITIES		0x771

src/soc/amd/stoneyridge/mca.c

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/reset.h>
+#include <cpu/amd/msr.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/msr.h>
 #include <acpi/acpi.h>