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soc/amd*/smihandler: factor out and rename clear_all_smi_status 

The old name was misleading, since it doesn't disable the generation of
SMIs, but clears the status registers.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iddadbec013091c2e5993a6303e291451c3d1e7ce
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50459
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2021-02-10 01:26:07 +01:00 committed by Martin Roth
parent ee2a365872
commit 4f69ab729a
4 changed files with 14 additions and 24 deletions
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1
src/soc/amd/common/block/include/amdblocks/smi.h
View File

@ -47,5 +47,6 @@ void configure_scimap(const struct sci_source *sci);
void disable_gevent_smi(uint8_t gevent);
void gpe_configure_sci(const struct sci_source *scis, size_t num_gpes);
void soc_route_sci(uint8_t event);
void clear_all_smi_status(void);
#endif /* AMD_BLOCK_SMI_H */

11
src/soc/amd/common/block/smi/smi_util.c
View File

@ -143,3 +143,14 @@ uint16_t pm_acpi_smi_cmd_port(void)
{
return pm_read16(PM_ACPI_SMI_CMD);
}
void clear_all_smi_status(void)
{
smi_write32(SMI_SCI_STATUS, smi_read32(SMI_SCI_STATUS));
smi_write32(SMI_EVENT_STATUS, smi_read32(SMI_EVENT_STATUS));
smi_write32(SMI_REG_SMISTS0, smi_read32(SMI_REG_SMISTS0));
smi_write32(SMI_REG_SMISTS1, smi_read32(SMI_REG_SMISTS1));
smi_write32(SMI_REG_SMISTS2, smi_read32(SMI_REG_SMISTS2));
smi_write32(SMI_REG_SMISTS3, smi_read32(SMI_REG_SMISTS3));
smi_write32(SMI_REG_SMISTS4, smi_read32(SMI_REG_SMISTS4));
}

13
src/soc/amd/picasso/smihandler.c
View File

@ -123,17 +123,6 @@ static void sb_apmc_smi_handler(void)
mainboard_smi_apmc(cmd);
}
static void disable_all_smi_status(void)
{
smi_write32(SMI_SCI_STATUS, smi_read32(SMI_SCI_STATUS));
smi_write32(SMI_EVENT_STATUS, smi_read32(SMI_EVENT_STATUS));
smi_write32(SMI_REG_SMISTS0, smi_read32(SMI_REG_SMISTS0));
smi_write32(SMI_REG_SMISTS1, smi_read32(SMI_REG_SMISTS1));
smi_write32(SMI_REG_SMISTS2, smi_read32(SMI_REG_SMISTS2));
smi_write32(SMI_REG_SMISTS3, smi_read32(SMI_REG_SMISTS3));
smi_write32(SMI_REG_SMISTS4, smi_read32(SMI_REG_SMISTS4));
}
static void sb_slp_typ_handler(void)
{
uint32_t pci_ctrl, reg32;
@ -172,7 +161,7 @@ static void sb_slp_typ_handler(void)
wbinvd();
disable_all_smi_status();
clear_all_smi_status();
/* Do not send SMI before AcpiPm1CntBlkx00[SlpTyp] */
pci_ctrl = pm_read32(PM_PCI_CTRL);

13
src/soc/amd/stoneyridge/smihandler.c
View File

@ -118,17 +118,6 @@ static void sb_apmc_smi_handler(void)
mainboard_smi_apmc(cmd);
}
static void disable_all_smi_status(void)
{
smi_write32(SMI_SCI_STATUS, smi_read32(SMI_SCI_STATUS));
smi_write32(SMI_EVENT_STATUS, smi_read32(SMI_EVENT_STATUS));
smi_write32(SMI_REG_SMISTS0, smi_read32(SMI_REG_SMISTS0));
smi_write32(SMI_REG_SMISTS1, smi_read32(SMI_REG_SMISTS1));
smi_write32(SMI_REG_SMISTS2, smi_read32(SMI_REG_SMISTS2));
smi_write32(SMI_REG_SMISTS3, smi_read32(SMI_REG_SMISTS3));
smi_write32(SMI_REG_SMISTS4, smi_read32(SMI_REG_SMISTS4));
}
static void sb_slp_typ_handler(void)
{
uint32_t pci_ctrl, reg32;
@ -167,7 +156,7 @@ static void sb_slp_typ_handler(void)
wbinvd();
disable_all_smi_status();
clear_all_smi_status();
/* Do not send SMI before AcpiPm1CntBlkx00[SlpTyp] */
pci_ctrl = pm_read32(PM_PCI_CTRL);