soc/amd*/smihandler: factor out and rename clear_all_smi_status
The old name was misleading, since it doesn't disable the generation of SMIs, but clears the status registers. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Iddadbec013091c2e5993a6303e291451c3d1e7ce Reviewed-on: https://review.coreboot.org/c/coreboot/+/50459 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -47,5 +47,6 @@ void configure_scimap(const struct sci_source *sci);
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void disable_gevent_smi(uint8_t gevent);
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void disable_gevent_smi(uint8_t gevent);
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void gpe_configure_sci(const struct sci_source *scis, size_t num_gpes);
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void gpe_configure_sci(const struct sci_source *scis, size_t num_gpes);
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void soc_route_sci(uint8_t event);
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void soc_route_sci(uint8_t event);
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void clear_all_smi_status(void);
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#endif /* AMD_BLOCK_SMI_H */
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#endif /* AMD_BLOCK_SMI_H */
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@ -143,3 +143,14 @@ uint16_t pm_acpi_smi_cmd_port(void)
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{
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{
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return pm_read16(PM_ACPI_SMI_CMD);
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return pm_read16(PM_ACPI_SMI_CMD);
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}
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}
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void clear_all_smi_status(void)
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{
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smi_write32(SMI_SCI_STATUS, smi_read32(SMI_SCI_STATUS));
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smi_write32(SMI_EVENT_STATUS, smi_read32(SMI_EVENT_STATUS));
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smi_write32(SMI_REG_SMISTS0, smi_read32(SMI_REG_SMISTS0));
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smi_write32(SMI_REG_SMISTS1, smi_read32(SMI_REG_SMISTS1));
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smi_write32(SMI_REG_SMISTS2, smi_read32(SMI_REG_SMISTS2));
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smi_write32(SMI_REG_SMISTS3, smi_read32(SMI_REG_SMISTS3));
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smi_write32(SMI_REG_SMISTS4, smi_read32(SMI_REG_SMISTS4));
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}
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@ -123,17 +123,6 @@ static void sb_apmc_smi_handler(void)
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mainboard_smi_apmc(cmd);
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mainboard_smi_apmc(cmd);
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}
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}
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static void disable_all_smi_status(void)
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{
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smi_write32(SMI_SCI_STATUS, smi_read32(SMI_SCI_STATUS));
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smi_write32(SMI_EVENT_STATUS, smi_read32(SMI_EVENT_STATUS));
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smi_write32(SMI_REG_SMISTS0, smi_read32(SMI_REG_SMISTS0));
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smi_write32(SMI_REG_SMISTS1, smi_read32(SMI_REG_SMISTS1));
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smi_write32(SMI_REG_SMISTS2, smi_read32(SMI_REG_SMISTS2));
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smi_write32(SMI_REG_SMISTS3, smi_read32(SMI_REG_SMISTS3));
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smi_write32(SMI_REG_SMISTS4, smi_read32(SMI_REG_SMISTS4));
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}
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static void sb_slp_typ_handler(void)
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static void sb_slp_typ_handler(void)
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{
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{
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uint32_t pci_ctrl, reg32;
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uint32_t pci_ctrl, reg32;
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@ -172,7 +161,7 @@ static void sb_slp_typ_handler(void)
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wbinvd();
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wbinvd();
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disable_all_smi_status();
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clear_all_smi_status();
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/* Do not send SMI before AcpiPm1CntBlkx00[SlpTyp] */
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/* Do not send SMI before AcpiPm1CntBlkx00[SlpTyp] */
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pci_ctrl = pm_read32(PM_PCI_CTRL);
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pci_ctrl = pm_read32(PM_PCI_CTRL);
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@ -118,17 +118,6 @@ static void sb_apmc_smi_handler(void)
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mainboard_smi_apmc(cmd);
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mainboard_smi_apmc(cmd);
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}
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}
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static void disable_all_smi_status(void)
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{
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smi_write32(SMI_SCI_STATUS, smi_read32(SMI_SCI_STATUS));
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smi_write32(SMI_EVENT_STATUS, smi_read32(SMI_EVENT_STATUS));
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smi_write32(SMI_REG_SMISTS0, smi_read32(SMI_REG_SMISTS0));
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smi_write32(SMI_REG_SMISTS1, smi_read32(SMI_REG_SMISTS1));
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smi_write32(SMI_REG_SMISTS2, smi_read32(SMI_REG_SMISTS2));
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smi_write32(SMI_REG_SMISTS3, smi_read32(SMI_REG_SMISTS3));
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smi_write32(SMI_REG_SMISTS4, smi_read32(SMI_REG_SMISTS4));
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}
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static void sb_slp_typ_handler(void)
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static void sb_slp_typ_handler(void)
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{
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{
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uint32_t pci_ctrl, reg32;
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uint32_t pci_ctrl, reg32;
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@ -167,7 +156,7 @@ static void sb_slp_typ_handler(void)
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wbinvd();
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wbinvd();
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disable_all_smi_status();
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clear_all_smi_status();
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/* Do not send SMI before AcpiPm1CntBlkx00[SlpTyp] */
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/* Do not send SMI before AcpiPm1CntBlkx00[SlpTyp] */
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pci_ctrl = pm_read32(PM_PCI_CTRL);
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pci_ctrl = pm_read32(PM_PCI_CTRL);
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